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International Journal of Electronics Volume 99, 2012 - Issue 7
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Original Articles

Enhanced ION/IOFF in ultra deep submicron CMOS devices using grooved nMOSFETs in comparison to planar nMOSFET

Subhra Dhar ABV‐Indian Institute of Information Technology and Management, Gwalior 474010, Madhya Pradesh, IndiaCorrespondence[email protected]
,
Manisha Pattanaik ABV‐Indian Institute of Information Technology and Management, Gwalior 474010, Madhya Pradesh, India
&
P. Rajaram Department of Physics, Jiwaji University, Gwalior 474009, Madhya Pradesh, India
Pages 1013-1025 | Received 14 Jan 2011, Accepted 04 Nov 2011, Published online: 31 Jan 2012

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Vijay Kumar Sharma, Manisha Pattanaik & Balwinder Raj. (2015) INDEP approach for leakage reduction in nanoscale CMOS circuits. International Journal of Electronics 102:2, pages 200-215.
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V.K. Sharma, M. Pattanaik & B. Raj. (2014) ONOFIC approach: low power high speed nanoscale VLSI circuits design. International Journal of Electronics 101:1, pages 61-73.
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Articles from other publishers (1)

Sankit R. Kassa & R. K. Nagaria. (2015) A Review on Robust Low Power System Level Digital Circuit Design Approaches in Nano-CMOS Technologies. A Review on Robust Low Power System Level Digital Circuit Design Approaches in Nano-CMOS Technologies.

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