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International Journal of Electronics Volume 100, 2013 - Issue 8
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Original Articles

Low cost high throughput pipelined architecture of 2-D 8 × 8 integer transforms for H.264/AVC

Meeturani Sharma Department of Electronic Engineering, Konkuk University, 1 Hwayang-dong, Gwangjin-gu, Seoul 143-701, South Korea
,
Honey Durga Tiwari Department of Electronic Engineering, Konkuk University, 1 Hwayang-dong, Gwangjin-gu, Seoul 143-701, South Korea
&
Yong Beom Cho Department of Electronic Engineering, Konkuk University, 1 Hwayang-dong, Gwangjin-gu, Seoul 143-701, South KoreaCorrespondence[email protected]
Pages 1033-1045 | Received 07 Dec 2011, Accepted 01 Aug 2012, Published online: 30 Jan 2013

Citations (2)

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Read on this site (1)

Hamid Reza Nayeri & Farzad Zargari. (2018) Hardware solution for implementing the entire inverse IDCTs in HEVC decoder. International Journal of Electronics 105:8, pages 1261-1272.
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Articles from other publishers (1)

Po-Hung Chen, Hung-Ming Chen & Ing-Chao Lin. (2015) A Systematic Hardware Sharing Method for Unified Architecture Design of H.264 Transforms. Mathematical Problems in Engineering 2015, pages 1-14.
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