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International Journal of Production Research Volume 30, 1992 - Issue 5
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Original Articles

A heuristic procedure for component scheduling in printed circuit pack sequencers

DILEEP R. SULE Professor and Coordinator of IE, ME/IE Department, Louisiana Tech University, PO Box 10348, Ruston, LA, 71272, USA.
Pages 1191-1208 | Received 01 Sep 1991, Published online: 30 Mar 2007

Citations (6)

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Read on this site (2)

Patcharaporn Neammanee & SabahU. Randhawa. (2003) Integrated methodology for board assignment and component allocation in printed circuit board assembly. International Journal of Production Research 41:5, pages 919-937.
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G. BHASKAR & T. T. NARENDRAN. (1996) Grouping PCBs for set-up reduction: a maximum spanning tree approach. International Journal of Production Research 34:3, pages 621-632.
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Articles from other publishers (4)

Patcharaporn Neammanee & Manop Reodecha. (2009) A memetic algorithm-based heuristic for a scheduling problem in printed circuit board assembly. Computers & Industrial Engineering 56:1, pages 294-305.
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Serge Lambert, Georges Abdulnour, Jocelyn Drolet & Bernard Cyr. (2005) Flexibility analysis of a surface mount technology electronic assembly plant: An integrated model using simulation. International Journal of Flexible Manufacturing Systems 17:2, pages 151-167.
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YU-AN LI & SABAH RANDHAWA. (2002) COMPONENT TO MULTI-TRACK FEEDER ASSIGNMENT AND BOARD SEQUENCING IN PRINTED CIRCUIT BOARD ASSEMBLY. Journal of Electronics Manufacturing 11:01, pages 51-68.
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K. Raj Kumar & T.T. Narendran. (1997) A heuristic for sequencing PCBs with due‐dates. International Journal of Operations & Production Management 17:5, pages 446-467.
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