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Original Articles

Detecting Spatial Effects From Factorial Experiments: An Application From Integrated-Circuit Manufacturing

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Pages 149-160 | Published online: 12 Mar 2012

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Shuen-Lin Jeng & Ming-Jie Hsu. (2023) Clustering partially masked images with modified Radon transformation. Communications in Statistics - Simulation and Computation 52:11, pages 5231-5255.
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Mejdal A. Alqahtani, Myong K. Jeong & Elsayed A. Elsayed. (2020) Multilevel spatial randomness approach for monitoring changes in 3D topographic surfaces. International Journal of Production Research 58:18, pages 5545-5558.
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Byunghoon Kim, Young-Seon Jeong, Seung Hoon Tong & Myong K. Jeong. (2020) A generalised uncertain decision tree for defect classification of multiple wafer maps. International Journal of Production Research 58:9, pages 2805-2821.
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Jinho Kim, Youngmin Lee & Heeyoung Kim. (2018) Detection and clustering of mixed-type defect patterns in wafer bin maps. IISE Transactions 50:2, pages 99-111.
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Chen-Fu Chien, Shao-Chung Hsu & Ying-Jen Chen. (2013) A system for online detection and classification of wafer bin map defect patterns for manufacturing intelligence. International Journal of Production Research 51:8, pages 2324-2338.
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Gyunghyun Choi, Sung-Hee Kim, Chunghun Ha & Suk Joo Bae. (2012) Multi-step ART1 algorithm for recognition of defect patterns on semiconductor wafers. International Journal of Production Research 50:12, pages 3274-3287.
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Suk Joo Bae, Jung Yoon Hwang & Way Kuo. (2007) Yield prediction via spatial modeling of clustered defect counts across a wafer map. IIE Transactions 39:12, pages 1073-1083.
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Chih-Hsuan Wang, Way Kuo & Halima Bensmail. (2006) Detection and classification of defect patterns on semiconductor wafers. IIE Transactions 38:12, pages 1059-1068.
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C.-H. Wang, S.-J. Wang & W.-D. Lee. (2006) Automatic identification of spatial defect patterns for semiconductor manufacturing. International Journal of Production Research 44:23, pages 5169-5185.
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Chen-Fu Chien, Ting-Hao Lin, Qiao-Wen Liu, Cheng-Yung Peng, Shao-Chung Hsu & Chia-Chi Huang. (2002) DEVELOPING A DATA MINING METHOD FOR WAFER BINMAP CLUSTERING AND AN EMPIRICAL STUDY IN A SEMICONDUCTOR MANUFACTURING FAB. Journal of the Chinese Institute of Industrial Engineers 19:2, pages 23-38.
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S. F. Liu, F. L. Chen & W. B. Lu. (2002) Wafer bin map recognition using a neural network approach. International Journal of Production Research 40:10, pages 2207-2223.
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José Ramírez & Winson Taam. (2000) An Autologistic Model for Integrated Circuit Manufacturing. Journal of Quality Technology 32:3, pages 254-262.
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MarkH. Hansen, VijayanN. Nair & DavidJ. Friedman. (1997) Monitoring Wafer Map Data From Integrated Circuit Fabrication Processes for Spatially Clustered Defects. Technometrics 39:3, pages 241-253.
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Peter Mesenbrink, Jye-Chyi Lu, Richard McKenzie & Javad Taheri. (1994) Characterization and Optimization of a Wave-Soldering Process. Journal of the American Statistical Association 89:428, pages 1209-1217.
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Jeongman Choi, Eun-Yeol Ma & Heeyoung Kim. Simultaneous classification and out-of-distribution detection for wafer bin maps. Quality Engineering 0:0, pages 1-13.
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Articles from other publishers (19)

Hyuck Lee, Hyeonwoo Kim & Heeyoung Kim. (2024) Classification of Chip-Level Defect Types in Wafer Bin Maps Using Only Wafer-Level Labels. Journal of Manufacturing Science and Engineering 146:7.
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Seung-Hyun Choi, Dong-Hee Lee, Eun-Su Kim, Young-Mok Bae, Young-Chan Oh & Kwang-Jae Kim. (2024) Development of a spatial dimension-based taxonomy for classifying the defect patterns in a wafer bin map. Advanced Engineering Informatics 60, pages 102540.
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Rui Wang & Nan Chen. (2022) Detection and Recognition of Mixed-Type Defect Patterns in Wafer Bin Maps via Tensor Voting. IEEE Transactions on Semiconductor Manufacturing 35:3, pages 485-494.
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Tae San Kim, Jong Wook Lee, Won Kyung Lee & So Young Sohn. (2021) Novel method for detection of mixed-type defect patterns in wafer maps based on a single shot detector algorithm. Journal of Intelligent Manufacturing 33:6, pages 1715-1724.
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Dorit S. Hochbaum & Sheng Liu. (2018) Adjacency-Clustering and Its Application for Yield Prediction in Integrated Circuit Manufacturing. Operations Research 66:6, pages 1571-1585.
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Kiryong Kyeong & Heeyoung Kim. (2018) Classification of Mixed-Type Defect Patterns in Wafer Bin Maps Using Convolutional Neural Networks. IEEE Transactions on Semiconductor Manufacturing 31:3, pages 395-402.
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Mika Liukkonen & Yrjö Hiltunen. (2018) Recognition of Systematic Spatial Patterns in Silicon Wafers Based on SOM and K-means. IFAC-PapersOnLine 51:2, pages 439-444.
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Hang Dong, Nan Chen & Kaibo Wang. (2017) Wafer yield prediction using derived spatial variables. Quality and Reliability Engineering International 33:8, pages 2327-2342.
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Lulu Bao, Qiang Huang & Kaibo Wang. (2015) Robust Parameter Design for Profile Quality Control. Quality and Reliability Engineering International 32:3, pages 1059-1070.
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Chia-Yu Hsu. (2015) Clustering Ensemble for Identifying Defective Wafer Bin Map in Semiconductor Manufacturing. Mathematical Problems in Engineering 2015, pages 1-11.
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Matthew Plumlee & Jianjun Shi. (2013) Estimating spatial and temporal patterns of defects. Manufacturing Letters 1:1, pages 25-27.
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Chiao-Wen Liu & Chen-Fu Chien. (2013) An intelligent system for wafer bin map defect diagnosis: An empirical study for semiconductor manufacturing. Engineering Applications of Artificial Intelligence 26:5-6, pages 1479-1486.
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Choudur K. Lakshminarayan & Michael I. Baron. 2013. Big Data Analytics. Big Data Analytics 185 196 .
Manuel Ruiz, Fernando López & Antonio Páez. (2009) Testing for spatial association of qualitative data using symbolic dynamics. Journal of Geographical Systems 12:3, pages 281-309.
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Chih-Hsuan Wang. (2009) Separation of composite defect patterns on wafer bin map using support vector clustering. Expert Systems with Applications 36:2, pages 2554-2561.
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C. K. Hansen & P. Thyregod. (2000) Analysis of integrated circuit fault data using generalized linear models. Quality and Reliability Engineering International 16:3, pages 173-185.
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José G. Ramírez & Brenda Cantell. (1997) AN ANALYSIS OF A SEMICONDUCTOR EXPERIMENT USING YIELD AND SPATIAL INFORMATION. Quality and Reliability Engineering International 13:1, pages 35-46.
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Randall S. Collica, José G. Ramírez & Winson Taam. (1996) Process monitoring in integrated circuit fabrication using both yield and spatial statistics. Quality and Reliability Engineering International 12:3, pages 195-202.
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B. M. Dabade & P. K. Ray. (1996) Quality engineering for continuous performance improvement in products and processes: A review and reflections. Quality and Reliability Engineering International 12:3, pages 173-189.
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