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Journal of the Chinese Institute of Engineers Volume 28, 2005 - Issue 4
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Original Articles

Design of an adjustable‐way cache for energy reduction

Hsin‐Chuan Chen Department of Electronic Engineering, St. John's & St. Mary's Institute of Technology, Taipei, Taiwan 251, R.O.C. Phone: 886–2–28282086 E-mail: [email protected])
&
Jen‐Shiun Chiang Department of Electrical Engineering, Tamkang University, Taipei, Taiwan 251, R.O.C.
Pages 691-700 | Received 27 Nov 2003, Accepted 22 Nov 2004, Published online: 04 Mar 2011

Citations (8)

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Read on this site (2)

H.-C. Chen. (2011) Low-power way-predicting cache based on intrablock access. Journal of the Chinese Institute of Engineers 34:4, pages 529-537.
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Hsin‐Chuan Chen. (2008) Design of a low‐power way‐predicting cache using valid‐bit pre‐decision strategy. Journal of the Chinese Institute of Engineers 31:5, pages 805-814.
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