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IETE Journal of Research Volume 63, 2017 - Issue 2
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Articles

Variability Analysis of Stochastic Parameters on the Electrical Performance of On-Chip Current-Mode Interconnect System

Yash AgrawalDhirubhai Ambani Institute of Information and Communication Technology, Ganghinagar, Gujarat,IndiaView further author information
,
Rajeevan ChandelDepartment of Electronics & Communication Engineering, National Institute of Technology, Hamirpur, Himachal Pradesh, IndiaView further author information
&
Rohit DhimanDepartment of Electronics & Communication Engineering, National Institute of Technology, Hamirpur, Himachal Pradesh, IndiaView further author information
Pages 268-280 | Published online: 22 Dec 2016

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Gulafsha Bhatti, Takshashila Pathade, Yash Agrawal, Vinay Palaparthy, Bakul Gohel, Rutu Parekh & Mekala Girish Kumar. (2023) Neural Network-based Fast and Intelligent Signal Integrity Assessment Model for Emerging MWCNT Bundle On-Chip Interconnects in Integrated Circuit. IETE Journal of Research 0:0, pages 1-16.
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Articles from other publishers (8)

Urmi Shah & Usha Mehta. 2023. Advances in VLSI and Embedded Systems. Advances in VLSI and Embedded Systems 187 201 .
Mekala Girish Kumar, Yash Agrawal & Vobulapuram Ramesh Kumar. (2022) Process variations in dielectric inserted side contact multilayer graphene nanoribbon interconnects using montecarlo simulations. Process variations in dielectric inserted side contact multilayer graphene nanoribbon interconnects using montecarlo simulations.
Soheila Gharavi Hamedani & Mohammad Hossein Moaiyeri. (2021) Crosstalk Delay and Noise Optimization in Nanoscale Multi-line Interconnects Based on Repeater Staggering in Ternary Logic. ECS Journal of Solid State Science and Technology 10:10, pages 101003.
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Reza Karimi, Mohammad Hossein Moaiyeri & Soheila Gharavi Hamedani. (2021) An ultra-energy-efficient crosstalk-immune interconnect architecture based on multilayer graphene nanoribbons for deep-nanometer technologies. Journal of Computational Electronics 20:3, pages 1411-1421.
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Rashmit Patel, Yash Agrawal & Rutu Parekh. (2020) Design of prominent SET‐based high performance computing system. IET Circuits, Devices & Systems 14:2, pages 159-167.
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Nikita Patel, Yash Agrawal, Rutu Parekh & Mekala Girish Kumar. (2020) Variability Analysis of On-chip Graphene Interconnects at Subthreshold Regime. Variability Analysis of On-chip Graphene Interconnects at Subthreshold Regime.
Nikita Patel & Yash Agrawal. (2019) A Literature Review on Next Generation Graphene Interconnects. Journal of Circuits, Systems and Computers 28:09, pages 1930008.
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Yash Agrawal, M Girish & Rajeevan Chandel. (2018) An efficient and novel FDTD method based performance investigation in high-speed current-mode signaling SWCNT bundle interconnect. Sādhanā 43:11.
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