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Articles

A High-Speed, Low-Power, and Area-Efficient FGMOS-Based Full Adder

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J. R. Dinesh Kumar & C. Ganesh Babu. (2023) Performance Investigation of a Modified Hybrid Parallel Prefix Adder for Speedy and Lesser Power Computations. IETE Journal of Research 69:5, pages 2310-2327.
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Articles from other publishers (3)

Uma Sharma & Mansi Jhamb. 2024. Micro and Nanoelectronics Devices, Circuits and Systems. Micro and Nanoelectronics Devices, Circuits and Systems 339 353 .
Uma Sharma & Mansi Jhamb. (2022) Efficient Design of FGMOS-Based Low-Power Low-Voltage XOR Gate. Circuits, Systems, and Signal Processing 42:5, pages 2852-2871.
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P. L. Santosh Kumar Reddy & Y. P. Obulesu. (2022) Design and Development of a New Transformerless Multi-port DC–DC Boost Converter. Journal of Electrical Engineering & Technology 18:2, pages 1013-1028.
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