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Original Articles

A Cascaded Multi-level Inverter Topology with Improved Modulation Scheme

Pages 768-777 | Received 12 Jul 2013, Accepted 19 Jan 2014, Published online: 24 Apr 2014

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Read on this site (3)

V. Hari Priya, D. Sreenivasarao & G. Siva Kumar. (2023) An improved PWM with simplified unified switched logic (USL) for RSC MLIs. International Journal of Electronics 0:0, pages 1-24.
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Raghavendra Reddy Karasani, Vijay Bhanuji Borghate, Sidharth Sabyasachi, Hiralal Murlidhar Suryawanshi & Prafullachandra Madhukar Meshram. (2017) Cascaded Multi-level Inverter Topology Developed from a Modified H-bridge. Electric Power Components and Systems 45:11, pages 1191-1201.
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Charles I. Odeh & Vincent N. Agu. (2017) Cascaded Common Nodal Point Multi-level Inverter Topology. Electric Power Components and Systems 45:5, pages 534-547.
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Articles from other publishers (14)

Sathyavani Bandela, Tara Kalyani Sandipamu, Hari Priya Vemuganti, Shriram S. Rangarajan, E. Randolph Collins & Tomonobu Senjyu. (2023) An Efficacious Modulation Gambit Using Fewer Switches in a Multilevel Inverter. Sustainability 15:4, pages 3326.
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Aratipamula Bhanuchandar & Bhagwan K. Murthy. 2023. Smart Energy and Advancement in Power Technologies. Smart Energy and Advancement in Power Technologies 41 51 .
Hari Priya Vemuganti, Sreenivasarao Dharmavarapu, Siva Kumar Ganjikunta, Hiralal Murlidhar Suryawanshi & Haitham Abu Rub. (2021) A Survey on Reduced Switch Count Multilevel Inverters. IEEE Open Journal of the Industrial Electronics Society, pages 1-1.
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A. Rakesh Kumar, Partha Sarathi Subudhi, T. Deepa, S. Krithiga, Sanjeevikumar Padmanaban & D. P. Kothari. (2019) Simulation Analysis of a Nearest Level Modulation Scheme for Cross-Connected Sources based MLI. Simulation Analysis of a Nearest Level Modulation Scheme for Cross-Connected Sources based MLI.
Kanike Vinod Kumar & R. Saravana Kumar. (2019) Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter. IEEE Access 7, pages 97719-97731.
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Prabhu Omer, Jagdish Kumar & Balwinder Singh Surjan. (2018) A New Multilevel Inverter Topology with Reduced Switch Count and Device Stress. A New Multilevel Inverter Topology with Reduced Switch Count and Device Stress.
Ayiguzhali Tuluhong, Weiqing Wang, Yongdong Li & Lie Xu. (2018) A Novel Hybrid T-Type Three-Level Inverter Based on SVPWM for PV Application. Journal of Electrical and Computer Engineering 2018, pages 1-12.
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Tuluhong Ayiguzhali, Mahemuti Pazilai, Yongdong Li, Lie Xu & Weiqing Wang. (2018) A Modular Multilevel T-Type Inverter Based on SVPWM for PV System Application. A Modular Multilevel T-Type Inverter Based on SVPWM for PV System Application.
Hari Priya Vemuganti, Dharmavarapu Sreenivasarao, Ganjikunta Siva Kumar & Appikonda Sai Spandana. (2018) Reduced carrier PWM scheme with unified logical expressions for reduced switch count multilevel inverters. IET Power Electronics 11:5, pages 912-921.
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Hari Priya Vemuganti, Dharmavarapu Sreenivasarao & Ganjikunta Siva Kumar. (2017) Improved pulse‐width modulation scheme for T‐type multilevel inverter. IET Power Electronics 10:8, pages 968-976.
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Charles Ikechukwu Odeh, Emeka S. Obe & Olorunfemi Ojo. (2016) Topology for cascaded multilevel inverter. IET Power Electronics 9:5, pages 921-929.
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T. Deepa & A. Rakesh Kumar. (2016) A new asymmetric multilevel inverter with reduced number of switches and reduction of harmonics using Sine Property. A new asymmetric multilevel inverter with reduced number of switches and reduction of harmonics using Sine Property.
B. Goldvin Sugirtha Dhas & S. N. Deepa. (2015) Fuzzy logic based dynamic sliding mode control of boost inverter in photovoltaic application. Journal of Renewable and Sustainable Energy 7:4.
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Charles I. Odeh. (2015) Improved three‐phase, five‐level pulse‐width modulation switched voltage source inverter. IET Power Electronics 8:4, pages 524-535.
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