Analytical Model of Gate to Channel Capacitance for Nanoscale MOSFETs

ABSTRACT

We present an analytical model for gate to channel capacitance, $C_{\mathrm{GC}}$, in nanoscale metal oxide semiconductor field effect transistors. The model incorporates quantum mechanical effects, drain-induced barrier lowering and short channel effects. While the charge density in the channel is evaluated using two-dimensional density of states, the average separation charges from the interface are determined from the solution of Schrodinger's wave equation. We evaluate the average separation of charge carriers from the silicon–silicon dioxide interface, which facilitates the evaluation of $C_{\mathrm{GC}}$. The calculated wavefunction gives a non-zero value at the Si–SiO₂ interface, which has a significant effect on $C_{\mathrm{GC}}$ vis-à-vis the obtained value when the zero wavefunction is used. The evaluated C_GC is seen to be in reasonable agreement with the self-consistent results of Hareland et al. and van Dort's model.

KEYWORDS:

• Charge density
• Potential well
• Gate to channel capacitance
• Wavefunction
• Drain-induced barrier lowering

ACKNOWLEDGEMENTS

We would like to thank Prof. P. N. Ram, Department of Physics, M J P Rohilkhand University, Bareilly, India, for his interest in the work. We are also thankful for the support and facility provided by ECE Department, TIET, Patiala, India, and the Department of Electronic Science, Kurukshetra University, Kurukshetra, India.

Additional information

Notes on contributors

Arun Kumar Chatterjee

Arun Kumar Chatterjee received the BE degree in electronics and communication engineering in 2002 from MIT, Moradabad, Uttar Pradesh, India, and ME degree in electronics engineering in 2008 from Punjab Engineering College, Chandigarh, India. He is currently pursuing the PhD degree at the Department of Electronics and Communication Engineering, Thapar University, Patiala, Punjab, India. His current research interest is design and modeling of nanoscale MOSFETs.

B. Prasad

B Prasad received the BSc degree in 1980 from Kerala University, Kerala, India, and the MSc degree in physics in 1982, MPhil in 1992 and PhD in 2002, all from Kurukshetra University, Kurukshetra, Haryana, India. His thesis was on Monte Carlo simulation techniques for electron transport in silicon. He is professor at Kurukshetra University, Kurukshetra, India. Since 1982, he has been involved in the development and fabrication of glass laser oscillator-amplifier system, which could be used for laser annealing of ion implanted silicon, design and fabrication of semiconductor devices. His current research involves, device modeling especially for sub-micron and nanoscale devices, study of oxy-nitride film as a possible gate material in sub-micron MOSFETs and reconfigurable hardware. Email: [email protected]