Abstract
This paper presents a modified Synchronous Reference Frame Phase locked loop (MSRFPLL) for better synchronizing the output of the inverter with the grid. The proposed PLL is able to track the changes in the grid frequency in a faster way as compared to the conventional synchronous reference frame PLL (SRF-PLL). In order to switch the inverter, an advanced bus clamping based space vector PWM is being used which is novel for photovoltaic application. This PWM gives better DC bus utilization as compared to the conventional Sine PWM technique. To keep the THD within a permissible limit of 5% in accordance with the IEEE-519 & 1547 standard LCL filter with passive damping is implemented. DSPACE-1104 DAC card has been used for better interfacing of the experimental set up with MATLAB. The overall system is also being simulated in MATLAB/Simulink environment and the simulated results have been validated with the experimental results.
ACKNOWLEDGEMENTS
The author would like to thank NIT Arunachal Pradesh and NERIST, Arunachal Pradesh, for its support to perform all the experiments of the proposed work by allowing to use all the available instruments.
Additional information
Notes on contributors
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A. Shantanu Chatterjee
Shantanu Chatterjee received his BTech degree in electronics & instrumentation engineering in 2010 from WBUT, West Bengal. He obtained his MTech and PhD degrees in power electronics & drives from VIT University, Vellore, Tamil Nadu and NERIST, Arunachal Pradesh, in the years 2012 and 2019, respectively. Previously, he has worked as Sr research fellow in CSIR-CMERI Durgapur, West Bengal, from the period of 2012 to 2013. He joined NIT Arunachal Pradesh as assistant professor of Electrical Engineering at the year 2013 and currently working in the same organization. His research area includes power electronics & drives, grid integration of distributed generation systems, fractional order PID control and application of FACTS devices in distributed energy systems.