A Novel Design of 28 nm Latch Type Sense Amplifier for Differential Voltage Enhancement

Abstract

As IoT is getting a thriving development, IC technology has stepped into the nano-meter era. For advanced 28 nm process and beyond, the device pitch becomes smaller. As a result, the coupling effect increases rapidly, degrading the performance of the critical design block, such as sense amplifiers in SRAM design. In addition, the process variation needs to be carefully addressed. In this paper we introduce an improvement over traditional latch type sense amplifier. The modification employs additional coupling effect in order to cancel out the device coupling observed in original design. The improved design shows a significant yield improvement based on the Monte-Carlo simulations under various operating conditions. The layout pattern modification is also presented, demonstrating an alternative sense amplifier implementation to address the coupling effect at negligible power and area overhead.

Keywords:

• Coupling effect
• Differential voltage
• Monte-Carlo
• Sense amplifier
• SRAM
• SRAM circuit

Additional information

Notes on contributors

Yiping Zhang

Yiping Zhang (M’08) received the BS and MS of microelectronics and solid state electronics from Soochow University, P R China in 2005 and 2008, respectively. His research is on the memory reliability, especially SRAM and MRAM in sub-65 nm. He is now working on circuit architecture improving considering signal coupling suppression and process variation suppression. He is currently pursuing PhD degree in Soochow University, P R China. E-mail: [email protected]

Ziou Wang

Ziou Wang received BS and MS from Dalian University of Technology in 1991 and 1997, respectively, He received PhD from Peking University in 2001. He joined School of Electronics and Information Engineering of Soochow University in 2004. His research interests are nanometer semiconductor devices and storage systems.

Canyan Zhu

Canyan Zhu received BS and MS degrees from Wuhan University, P R China, in 1982 and 1988, respectively. He received PhD degree from Information and Communication Engineering, Beijing Institute of Technology, 1999. He is currently a professor in School of Rail Transportation, Soochow University, Suzhou, China. His research focuses on theory and technology of intelligent system, realtime signal processing, theory and technology of nonlinear systems. E-mail: [email protected]

Lijun Zhang

Lijun Zhang received the BS from Huazhong University of Science and Technology, Wuhan, China, in 1993. The MS and PhD degrees from the Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China, in 1997 and 2000, respectively. He is currently a researcher in School of Rail Transportation, Soochow University, Suzhou, China, and working on SRAM stability and low power SRAM design in sub-65nm CMOS. His interests are professor VLSI design, embedded memory design and testing for SOC, and net working IC design. E-mail: [email protected]