A New Low Complexity Bit-truncation Based Motion Estimation and Its Efficient VLSI Architecture

Abstract

A new motion estimation method and its hardware implementation are presented in this paper. In this method, all the frames are firstly gray coded. After that, the two most significant bits from the current frame and reference frame are used to compute the motion vector. Besides, a diamond search algorithm is used in place of the full-search algorithm. The motion estimation scheme proposed in the present paper is also verified to work on various standard video sequences. The experimental results thus obtained show that the proposed algorithm has an excellent balance of performance and computational complexity. External memory access has been reduced drastically by incorporating search pixel reuse. The resulting architecture is simple in terms of the hardware cost and power requirements while being faster than a recently reported similar architecture. The proposed architecture requires less hardware than comparable systems without compromising performance. The proposed architecture is therefore suited to be used in portable consumer electronic devices with real-time video applications in which power consumption is a concern.

KEYWORDS:

• Bit truncation
• Diamond-search
• Gray-coded bit-plane matching
• Motion estimation

Additional information

Notes on contributors

Sravan K. Vittapu

Sravan K Vittapu received his BTech and MTech degrees in electronics and communications engineering from the JNTU, AP, India, in 2009 and 2013, respectively. Since 2013, he has been working with the Department of Electronics and Communications Engineering, in VBIT under JNTU, AP, India, as an assistant professor. Currently, he is a research scholar in the Department of Electrical & Electronics Engineering, BITS-Pilani, Hyderabad Campus, India. His areas of interest include image and video coding, and VLSI architectures for image and video compression algorithms. Email: [email protected]

Souvik Kundu

Souvik Kundu is assistant professor in the Department of Electrical & Electronics Engineering, BITS-Pilani (Hyderabad Campus). His research is focused on the area of VLSI designs, fabrications, memory and optoelectronic devices. He earned his PhD from IIT-Kharagpur and did post doctorate from Oregon State University and Virginia Tech, USA prior to joining BITS-Pilani, Hyderabad Campus. So far, he has supervised two PhD students and published 71 reputed international journals, conference proceedings, and 3 book chapters. He also delivered several invited lectures across the world. Email: [email protected]

Sumit K. Chatterjee

Sumit K Chatterjee received his PhD from the Indian Institute of Technology (IIT) Kharagpur, India, in 2011. Currently, he is serving as an assistant professor in the Department of Electrical & Electronics Engineering, BITS Pilani, Hyderabad campus. Earlier, he worked as an assistant professor in the Department of Electronics and Communication Engineering, National Institute of Technology, Sikkim. His areas of interest include VLSI architectures for image and video processing, digital signal processing, and telecommunication.