A Flexible Digitally Controlled Oscillator Structure to Reconfigure the Frequency Band in Multi-band RF AD-PLL System

Abstract

Reconfigurable architectures are more prominent in modern-day multi-band radio systems. This work has been conceptualized for a flexible 8-bit digitally controlled oscillator (DCO) design to suit reconfigurable RF all-digital phase-locked loop applications. To efficiently utilize the area, power consumption and attend to several operating frequencies, an optimal design of LC-tank based DCO topology with both L and C components contributing to the coarse and fine-tuning of the DCO’s frequency of oscillation has been proposed. The design has been carried out in the Cadence Spectre RF tool with UMC180 nm technology. The proposed 8-bit DCO exhibits wide bandwidth, generating 240 oscillating frequencies in the LTE frequency band and occupies less area of 70 × 18 µm. The frequency of oscillation varies from 491.5 MHz to 3.392 GHz designed for an 8-bit digital control word with a tuning range percentage of 149%. The maximum phase noise obtained is −103.57 dBc/Hz @ 10 MHz offset causing a figure of merit (FOM) of −144.167 dBc/Hz. The total power consumed by the DCO ranges from 1.05 to 9.5 mW approximately.

KEYWORDS:

• CMOS
• Mixed signal design
• Digitally controlled oscillator
• Reconfigurable circuit
• AD-PLL

ACKNOWLEDGEMENTS

The authors express their gratitude to Ministry of Electronics and Information technology, Govt. of India for funding the research scholar under the DeitY PhD Scheme (VISPHD-MEITY-1732).

Disclosure statement

No potential conflict of interest was reported by the author(s).

Additional information

Funding

This work was supported by Ministry of Electronics and Information technology [grant number VISPHD-MEITY-1732].

Notes on contributors

S. Aditya

S Aditya received her bachelor of engineering degree from Anna University, Chennai in 2007. She worked in a software firm in Oracle Peoplesoft ERP for 2 years. She received her Master of Science (by Research) in analog VLSI from National Institute of Technology, Tiruchirappalli in 2014. Recently, she completed her doctor of philosophy in RF IC design at National Institute of Technology, Tiruchirappalli. Her research interests are PLL, frequency synthesizer, active inductor, RF circuits and mixed signal VLSI design.

Sridharan Moorthi

S Moorthi is a faculty in the Department of Electrical and Electronics Engineering, National Institute of Technology, Trichy, India, since 2007 and is associated with the VLSI Systems Research Laboratory in the same department. He completed his PhD in the area of VLSI for communication circuits during 2008 at Anna University, Chennai. Further, he is a post-doctoral fellow of Erasmus Mundus External Co-operation Window initiated under EURINDIA Programme in which he has done post-doctoral research on memory design for reconfigurable architectures at Royal Institute of Technology (KTH), Sweden. His research interests include VLSI for signal processing and embedded systems. Email: [email protected]