Low-Cost Three-Bit Counter Design in Quantum-Dot Cellular Automata Technology

Abstract

Quantum-dot cellular automata are a new nanoscale technology that has overcame several limitations in metal oxide technology and facilitates digital integrated circuits designs. A counter is a module that is employed in various digital systems. In this study, a progressive design for a three-bit counter has been presented using T flip-flops, which try to enhance the circuit efficiency. This circuit has 110 cells and occupies 0.11 µm² which reduces 33% of the counter area. The delay and the cost of this design are 1.5 clock cycles and 18, respectively. The simulation results illustrate 25% improvement in the circuit delay and 61% reduction in the circuit cost compare to the best prior circuit.

KEYWORDS:

• Digital circuit design
• Quantum-dot cellular automata
• T flip-flop
• Three-bit counter

Acknowledgments

The author would like to thank the Shahr-e-Qods Branch, Islamic Azad University, for supporting the cost of this work.

Disclosure statement

No potential conflict of interest was reported by the author(s).

Additional information

Funding

We declare that we received no funding from any organization.

Notes on contributors

Javad Mohammadi

Javad Mohammadi received the BS degree in electrical engineering electronic technology from Karaj Instructor Training Center, Iran, 2015, followed by the MS degree in electrical engineer of micro and nano electronics from Islamic Azad University, Department of Electrical Engineering, Shahr-e-Qods Branch, Tehran, Iran, 2019. He is interested in the field of computational nanotechnology and he specifically focuses on the quantum-dot cellular automata.

Mahdi Zare

Mahdi Zare received his BSc and MSc degrees in electrical engineering from South Tehran Branch, Islamic Azad University, Tehran, Iran, in 2001 and 2004, respectively. He received his PhD degree in electronic engineering at the Tehran Science and Research Branch, Islamic Azad University. He worked as a senior hardware engineer in Rayaphone Co since 2004. He is currently the faculty member of Shahr-e-Qods branch, Islamic Azad University. His research interests include performance and area optimization in latency-insensitive systems, multi-core synchronization, and mixed signals circuit design. He has published several scientific papers and has acted as a reviewer in several international journals and conferences. Email: [email protected]

Masoumeh Molaei

Masoumeh Molaei received her PhD degree (2019) in physical chemistry from the “Iran University of Science and Technology”, Iran. She is interested in quantum chemistry, specifically the density functional theory (DFT). She focuses on designing the efficient energy production and storage systems such as batteries and supercapacitor electrode materials using computer simulation. She has conducted many personal projects in these fields. Email: [email protected]

Mohsen Maadani

Mohsen Maadani received two BSc degrees in biomedical engineering and electronics engineering from Amirkabir University of Technology (AUT), Tehran, Iran and his MSc degree in electronics engineering from Sharif University of Technology, Tehran, Iran in 2003 and 2006, respectively. He received his PhD degree in electronics engineering from AUT in 2014. He has been a faculty member at the Department of Electrical Engineering, Shahr-e-Qods Branch, Islamic Azad University, Tehran, Iran, since 2007 and was granted the outstanding researcher of the year prize in 2015. His recent research activities are mainly focused on the internet of things, digital transformation, and wireless networks. Email: [email protected]