Lossless Compression of Hyperspectral Imagery by Assimilating Decorrelation and Pre-processing with Efficient Displaying Using Multiscale HDR Approach

Abstract

The instinctive essence of the Hyperspectral imagery cube is its immense information having both spatial and spectral correlation. In the interest of reducing the storage and bandwidth requisites, an effective lossless Hyperspectral compression system is proposed. The imagery is enforced to preprocessing stage preceding decorrelation. Preprocessing stage comprises band normalization and band ordering techniques. A technique named Greedy heap sorting is addressed to sort the bands. The proposed plan accords with a Compression ratio (CR) of 8.12 and bits per pixel (bpp) of 1.67. The performance of the system is comparable to earlier algorithms for lossless Hyperspectral image compression concerning compression ratio and bpp. An experiment conducted on AVIRIS images substantiates that the methodology presented surpasses the IP3-OBPS-BPS method by a percentage increase of 116.44 in CR and a percentage decrease of 58.49 in bpp. The multiscale High Dynamic Range (HDR) approach is used to project Hyperspectral images on devices with Low Dynamic Range (LDR) devices. The Bilateral filter is used for the decomposition of the image into multiple base layers and detail layer. The PSNR obtained is 37.4911 for the compressed HDR image, which signifies the better quality of the reconstructed image with a 4.8% compression ratio.

KEYWORDS:

• Band normalization
• Band ordering
• Edge preserving filters
• Heap sorting
• High dynamic range imaging
• Huffman encoder
• Prediction
• Pre-processing

Additional information

Notes on contributors

A. S. Anand Swamy

A S Anand Swamy is currently working as the head of the Department of Electronics and Communication Engineering at T John Institute of Technology, Bengaluru. He has about 12 years of teaching experience. He was a recipient of the IInd prize in 43rd ISTE National Annual Convention for guiding the Best MTech thesis in electrical and electronical engineering titled “Implementation of FFT Cordic Processor for Extraction and Verification of Image features”. He has publications in one SCI Journal, five international journals and four International conferences. His areas of interest are signal processing domain. Email: [email protected]

A. S. Mamatha

A S Mamatha is currently working as associate professor in the Department of Electronics and Communication Engineering at NMAM Institute of Technology, Nitte, Karkala, Udupi. She has 23 years of teaching experience. She is the author of four international journals and six international conferences in the field of multispectral image compression. She is the author of the “Network Theory and Engineering Statistics & Linear Algebra” textbook and “Control Engineering” textbook. Her areas of interest are signal processing, image compression, and control engineering etc. She is a Senior IEEE Member. Email: [email protected], [email protected]

N. Shylashree

N Shylashree is currently working as an associate professor in the Department of Electronics and Communication Engineering at RV College of Engineering, Bengaluru. She is having over 16 years of teaching experience. She was a recipient of the best PhD thesis award for the year 2016–2017 in electronics and communication engineering from BITES. She has received the best IEEE researcher award in IEEE-AGM meeting held during 2021 from Bangalore IEEE section. She has also received the best paper award in IEEE-ICERECT held during 2015 at Mandya. She has research publication in 18 international journals (out of which 5 journals are Springer-SCI journals), 4 Springer book chapters and 9 international conferences. She has published two patents and filed one German patent in the area of cryptography. She has also published two patents in the area of VLSI out of which one patent got the grant from Indian Patent office. She is also the co-author of the Network Theory, Engineering Statistics and Linear Algebra and Control Engineering textbooks. She has funded project on chalcogenide materials and consultancy projects on FPGA and has delivered many technical talks on VLSI. She has delivered lectures as a subject matter expert in VTU e-shikshana and EDUSAT program. She is a recipient of international travel grant under SERB young research scholar category. She is a Life Member of ISTE, IETE, Fellow Member of ISVE, Senior Member of IEEE and IEEE CAS Execom Member. Her areas of interest include network analysis, analysis and design of digital circuits, digital VLSI design, analog and mixed mode VLSI design, low power VLSI design, cryptography and network security, statistics and linear algebra and control engineering. Email: [email protected], [email protected]

Vijay Nath

Vijay Nath is associate professor at the Dept of ECE, BIT Mesra Ranchi, Jharkhand, India. He earned his PhD from Dr RML Avadh Univ Ayodhya in association with CEERI Pilani. His area of research includes CMOS VLSI design, ASIC design, embedded system, and signal processing and IoT. He completed five projects of Govt of India a costing more than Rs. 1.0 crore. He has editor of eight books published by Springer He has published 25 SCI journal articles and 70 book chapters.