A Study of Super Junction Trench Gate IGBT with Fully Self-Aligned Fabrication Technology

ABSTRACT

The main targets of this paper are decrease the on-resistance (power dissipation) and increase breakdown voltage of the super junction trench gate insulated gate bipolar transistor (SJ-TGIGBT) by designing new device structure combined with control and optimising the key fabrication technology parameters. We proposed a new trench gate IGBT with super junction structure in its n drift region, which exhibits a strongly improved relationship of device’s on-resistance with its blocking voltage. The on-resistance of SJ-TGIGBT is 1.25 power related to the thickness of its n drift region and linearly related to its breakdown voltage, which eliminated the 2.5 power of breakdown voltage relationship of on-resistance for conventional IGBT. An accurate control of impurity concentration of n drift region in the trench sidewall is important to achieve the performance of proposed SJ-TGIGBT, and tilted angle ion implantation is considered to be the most suitable method for the doped impurity fine controllability, so we optimized the trench sidewall doping by adjusting the ion implantation dosage and its implanted tilted angles. The proposed SJ-IGBTs are fabricated with designed silicides fully self-aligned technology using only four masks. The fabricated chips are measured with correct output I–V characteristics, the measured threshold voltage is 3.05–5.57 V, blocking voltage is 1130–1280 V. The measured results also confirmed that the reduction in on-resistance is about 12% compared with the conventional non-SJ IGBT, and more than 34% compared with the silicon limit of non-SJ metal-oxide-semiconductor (MOS) devices with a 1200 V voltage rating.

KEYWORDS:

• drift region
• fabrication
• fully self-aligned technology
• mask
• research
• silicides
• super junction structure
• trench gate IGBT

Acknowledgements

The authors would like to thank Prof. J. Q. Han and senior engineering Mr X. L.Wang in TSMC for their valuable support and feedback. This work is supported in part by the National Science Foundation of China (NSFC) (no. 51377025).

Disclosure statement

No potential conflict of interest was reported by the authors.

Additional information

Funding

National Science Foundation of China (NSFC) [grant number 51377025]

Notes on contributors

Shoucai Yuan

Shoucai Yuan was born in March 24, 1963. He received the BS degree in 1985 and the PhD degree in 2003 from Xi'an JiaoTong University, Xi'an ShaanXi, China. He received the MS degree in 1988 from ShaaXi Microelectronics Institute, ShaanXi, China. His majored interests include semiconductor devices / power semiconductor devices, microelectronics research, computer equipments and semiconductor devices/VLSI circuits design. He is currently an employee of GanNan Normal University as a microelectronics researcher and undergraduate and graduate course teacher at GanZhou, JiangXi, China.

E-mail: [email protected]

Yamei Liu

Yamei Liu was born in November 1, 1963. She is currently an employee of GanNan Normal University. She is as an assistant of this research.

E-mail: [email protected]