A 0.7 pJ/bit, 1.5 Gbps Energy-Efficient Image-Based True Random Number Generator

ABSTRACT

Random numbers cover a vast spectrum of applications. Hence generating it effectively with high performance is the need of the hour. This paper presents the novel design and implementation of high performance and energy-efficient true random number generator (TRNG) using images as a source. In the proposed work, the harvesting mechanism that comprises of hashing technique block (HTB) is used to reduce the intensity of pattern, an event counting circuit (ECC) is used for comparing the events, while a linear feedback shift register (LFSR), designed by considering a primitive polynomial function, is used to obtain the random numbers. The addition of 8 × 1 multiplexer (MUX) with meta-stable circuit feeder control lines had further increased the unpredictability in the proposed system. The implementation of the work has been done in the Xilinx Vivado simulation tool followed by the Cadence Virtuoso circuit simulation environment. The maximum speed of 1.5 Gbps with power dissipation of 1 mW and 0.7 pJ/bit energy efficiency with a layout area of 2218 μm² has been achieved in this work. NIST 800.22 statistical test suite and uniformity test comprising of Kolmogorov–Smirnov and Chi-square test have also been performed for validation of generated random numbers. The obtained binary sequences have passed all tests successfully with calculated entropy up to 0.999999999. The autocorrelation factor (ACF) of the output bit streams has been obtained as approximately zero (∼0) within 96% confidence bounds of a Gaussian distribution (µ = 0, 3σ). The proposed design is thus suitable for true random number generation.

KEYWORDS:

• Entropy
• LFSR
• Meta-stable
• NIST
• Random number
• TRNG

Acknowledgements

The authors would like to thank DST, GOI for providing support under ICPS program.

Additional information

Notes on contributors

Dhirendra Kumar

Dhirendra Kumar was born in Bihar, India. He received his BTech degree from WBUT, Kolkata, West Bengal in 2012 and MTech degree from Indian Institute of Information Technology, Allahabad, Uttar Pradesh in 2017. He is currently pursuing his PhD degree in electronics and communication engineering at IIIT Allahabad, Uttar Pradesh, India. His research areas are TRNG design, analog and mixed signal VLSI circuit design, low power VLSI circuit design etc. Email: [email protected]

Lakshmi Likhitha Mankali

Lakshmi Likhitha Mankali was born in Telangana, India. She received her dual degree BTech in electronics and communication engineering and MTech in microelectronics from IIIT Allahabad, Uttar Pradesh, India in 2019. Her research interests include analog and mixed signal VLSI design circuits, low power VLSI circuit design. Email: [email protected]

Prasanna Kumar Misra

Prasanna Kumar Misra received his PhD degree from IIT Kanpur, Uttar Pradesh, India in 2014. Since June 2014 he has been working as a faculty member in electronics and communication engineering, Department at IIIT Allahabad, Uttar Pradesh, India. His research interests are semiconductor device design and analog/RF integrated circuit design. Email: [email protected]

Manish Goswami

Manish Goswami received his PhD degree from BIT Mesra, Ranchi in 2012. He is currently holding associate professor ship at IIIT Allahabad, Uttar Pradesh, India. His research interests include Analog and mixed signal VLSI circuit design, low power VLSI circuit design. He has held a short-term position at Atlaz Digital Pvt Ltd Mumbai as assistant engineer R&D and worked as a lecturer at JECRC Jaipur, till 2005 and BIT Mesra till 2008.