Optimal Sizing of Recycling Folded Cascode Amplifier for Low Frequency Applications Using New Hybrid Swarm Intelligence-Based Technique

Figures & data

Table 1. Design specifications for use in low frequency systems.

Design Criteria	Specifications
Slew Rate (SR) (V/µs)	≥10
Load Capacitance, CL (pF)	≥15
Voltage Gain, Av (dB)	>40
Unity Gain Bandwidth, UGB (MHz)	≥2
Minimum ICMR,VCM(min) (V)	≥-1.6
Maximum ICMR,VCM(max) (V)	≤1.6
CMRR (dB)	> 60
PSRR (dB)	> 60
Power Dissipation, P (µW)	≤7
Vout(min) (V)	≥-1.8
Vout(max) (V)	≤1.8
Input Referred Noise, Sn (f) (V/√Hz)	≤500 n

Table 2. Values of other technology constants used.

Specification	Values used
VDD (V)	1.8
VSS (V)	−1.8
Vtp (V)	−0.42
Vtn (V)	0.42
Kn (µA/V^2)	355
Kp (µA/V^2)	75
AVTHN	5 nm
AVTHP	5.49 nm
Technology Node	180 nm
	0.04
	0.05

Figure 1. Schematic of RFC OpAmp.

Figure 2. Flowchart of HWPSO algorithm.

Table 3. Comparative analysis of the best results obtained using HWPSO and other algorithms after 20 independent runs.

Design Criteria	PSO	DE	DEPSO	HBPSO	DA	WOA	SSA	HWPSO
Slew Rate (V/s)	10	2.41	2.41	15.07	15.07	15.07	2.41	15.07
Unity Gain Bandwidth (MHz)	3.5	3.5	3.5	0.55	0.55	0.55	3.5	0.55
Voltage Gain (dB)	54.32	54.32	54.32	56.11	56.11	56.11	54.32	56.11
VCM(min) (V)	−0.294	−0.2937	−0.2937	−1.4	−1.4	−1.4	−0.294	−1.4
VCM(max)(V)	1.4874	1.4874	1.4874	1.11	1.11	1.11	1.4874	1.11
Power Dissipation (µW)	3.6907	3.69072	3.69072	6.106	6.106	6.106	3.6907	6.106
CMRR (dB)	83.68	83.68	83.68	74.48	74.48	74.48	83.68	74.48
PSRR (dB)	57.19	57.19	57.19	58.50	58.50	58.50	57.19	58.50
Input Noise (µV/√Hz)	0.97	0.97	0.97	0.89	0.89	0.89	0.97	0.89
Cut off frequency (KHz)	6.76	6.76	6.76	0.851	0.851	0.851	6.76	0.851
Total Area (m^2)	2.19e-10	2.19e-10	2.19e-10	2.12e-11	2.12e-11	2.12e-11	2.19e-10	2.12e- 11

Table 4. Optimal design parameters corresponding to best results obtained using HWPSO and other algorithms.

Design Parameters	PSO	DE	DEPSO	HBPSO	DA	WOA	SSA	HWPSO
I0 (µA)	33.3	33.3	33.3	50.53	50.53	50.53	33.3	50.53
W1a/L1	1/1	1/1	1/1	1/1	1/1	1/1	1/1	1/1
W1b/L1	1/1	1/1	1/1	1/1	1/1	1/1	1/1	1/1
W2b/L2	1/1	1/1	1/1	1/1	1/1	1/1	1/1	1/1
W2b/L2	1/1	1/1	1/1	1/1	1/1	1/1	1/1	1/1
W3/L3	1.25/1.25	0.2664/1.25	0.2664/1.25	0.5435/0.5	20.89/0.5	0.5435/0.5	1.25/1.25	0.5435/0.5
W4a/L4	7.8247/1.25	7.8247/1.25	7.8247/1.25	1.25/1.25	1.25/1.25	1.25/1.25	7.8247/1.25	1.25/1.25
W4b/L4	2.6082/1.25	2.6082/1.25	2.6082/1.25	0.4167/1.25	0.4167/1.25	0.4167/1.25	2.6082/1.25	0.4167/1.25
W5a/L5	7.8247/1.25	7.8247/1.25	7.8247/1.25	1.25/1.25	1.25/1.25	1.25/1.25	7.8247/1.25	1.25/1.25
W5b/L5	2.6082/1.25	2.6082/1.25	2.6082/1.25	0.4167/1.25	0.4167/1.25	0.4167/1.25	2.6082/1.25	0.4167/1.25
W6/L6	4.1732/1	4.1732/1	4.1732/1	1/1	1/1	1/1	4.1732/1	1/1
W7/L7	4.1732/1	4.1732/1	4.1732/1	1/1	1/1	1/1	4.1732/1	1/1
W8/L8	29.62/1.5	29.62/1.5	29.62/1.5	1.5/1.5	1.5/1.5	1.5/1.5	29.62/1.5	1.5/1.5
W9/L9	29.62/1.5	29.62/1.5	29.62/1.5	1.5/1.5	1.5/1.5	1.5/1.5	29.62/1.5	1.5/1.5
W10/L10	29.62/1.5	29.62/1.5	29.62/1.5	1.5/1.5	1.5/1.5	1.5/1.5	29.62/1.5	1.5/1.5
W11/L11	29.62/1.5	29.62/1.5	29.62/1.5	1.5/1.5	1.5/1.5	1.5/1.5	29.62/1.5	1.5/1.5
W12/L12	2.0866/0.5	2.0866/0.5	2.0866/0.5	0.5/0.5	0.5/0.5	0.5/0.5	2.0866/0.5	0.5/0.5
W13/L13	2.0866/0.5	2.0866/0.5	2.0866/0.5	0.5/0.5	0.5/0.5	0.5/0.5	2.0866/0.5	0.5/0.5

Table 5. Comparative results of algorithms in terms of best, worst, mean and standard deviation after more than 20 independent runs.

Optimum Circuit Area (m^2)	PSO	DE	DEPSO	HBPSO	DA	WOA	SSA	HWPSO
Best	2.19e-10	2.19e-10	2.19e-10	2.12e-11	2.12e-11	2.12e-11	2.19e-10	2.12e-11
Worst	2.19e-10	2.19e-10	2.19e-10	4.86e-11	4.86e-11	4.57e-11	2.19e-10	4.57e-11
Mean	2.19e-10	2.19e-10	2.19e-10	3.89e-11	3.89e-11	3.75e-11	2.19e-10	3.34e-11
SD	0	0	0	1.38e-11	1.38e-11	1.35e-11	0	1.34e-11

Table 6. Friedman’s test result considering minimum area for 20 independent runs.

Algorithm	Mean Rank	Rank
PSO	6.4500	4
DE	6.6500	5
DA	2.9000	3
WOA	2.1500	2
HWPSO	2.0500	1

Table 7. Mann Whitney U test result.

HWPSO vs.	p-value	U value	HWPSO U value
PSO	0.0000108	0	100
DE	0.0000108	0	100
DA	0.10	28.5	71.5
WOA	0.21	33.5	66.5

Figure 3. (a) Comparative analysis of the convergence plot (b) Box plot for HWPSO for the problem.

Table 8. Validation results for HWPSO and % deviation.

Design Criteria	HWPSO based optimization results	Cadence Virtuoso validation results for HWPSO (Pre-layout)	Cadence Virtuoso validation results for HWPSO (Post-layout)	% deviation (Pre-Post)
Slew Rate (V/µs)	15.07	15.1	15.05	0.19–0.13
UGB(MHz)	0.55	0.556	0.553	1.09–0.54
Gain(dB)	56.11	55.9	55.6	0.37–0.9
VCM(min) (V)	−1.4	−1.393	−1.390	0.5–0.71
VCM(max) (V)	1.11	1.116	1.114	0.54–0.36
Power dissipation (µW)	6.106	6.098	6.092	0.26–0.22
CMRR (dB)	74.48	74.12	74.07	0.48–0.55
PSRR (dB)	58.50	58.9	59.01	0.67–0.87
Input Noise (µV/√Hz)	0.89	0.902	0.905	1.3–1.6

Figure 4. Comparison of various specifications for the algorithms.

Figure 5. Cadence virtuoso simulated gain plot.

Figure 6. Cadence virtuoso simulated input referred noise plot.

Figure 7. Cadence virtuoso simulated power dissipation plot for HWPSO algorithm.

Figure 8. Cadence virtuoso simulated CMRR plot for HWPSO algorithm.

Figure 9. Cadence virtuoso simulated ICMR plot for HWPSO algorithm.

Figure 10. Cadence virtuoso simulated PSRR plot for HWPSO algorithm.

Figure 11. Layout of RFC OpAmp in cadence virtuoso.