Abstract
This paper presents a new mathematical model created for the common-drain amplifier using metal-ferroelectric-semiconductor field effect transistors (MFSFET). The model developed in this paper is based upon empirical data collected through experimentation with the common-drain amplifier while using a MFSFET. Several parameters are considered when calculating the output voltage, such as varying gate capacitance, input voltage, quiescent point, and power supply voltages. A comparison between collected and modeled data is presented as verification of the model's performance when applied to the common-drain configuration.