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Research Article

An implementation of an enhanced DG primary control equipped with fault detection scheme

, , , &
Pages 318-330 | Received 30 Dec 2022, Accepted 06 Mar 2023, Published online: 20 Mar 2023

Figures & data

Figure 1. Model representation of the proposed network.

Figure 1. Model representation of the proposed network.

Figure 2. Three-phase inverter and its control structure.

Figure 2. Three-phase inverter and its control structure.

Figure 3. Turn-off mode and V/f control mode of the three-phase inverter.

Figure 3. Turn-off mode and V/f control mode of the three-phase inverter.

Figure 4. Switch operation and fault detection scheme representation.

Figure 4. Switch operation and fault detection scheme representation.

Figure 5. Rotating reference frame.

Figure 5. Rotating reference frame.

Table 1. Model parameters.

Figure 6. Active/reactive power, voltage and frequency at the DG bus during normal operating conditions.

Figure 6. Active/reactive power, voltage and frequency at the DG bus during normal operating conditions.

Figure 7. Active/reactive power, voltage and current at PCC during normal operating conditions.

Figure 7. Active/reactive power, voltage and current at PCC during normal operating conditions.

Figure 8. Active/reactive power, voltage and frequency at DG bus during switch-off mode.

Figure 8. Active/reactive power, voltage and frequency at DG bus during switch-off mode.

Figure 9. Active/reactive power, current and trip signal at PCC during switch-off mode.

Figure 9. Active/reactive power, current and trip signal at PCC during switch-off mode.

Figure 10. Active/reactive power, voltage, frequency and trip signal at DG bus during V/f control mode.

Figure 10. Active/reactive power, voltage, frequency and trip signal at DG bus during V/f control mode.

Figure 11. Active/reactive power, current at PCC during V/f control mode.

Figure 11. Active/reactive power, current at PCC during V/f control mode.