Figures & data
Figure 1. Image of (a) sample A, (b) sample B, and (c) sample C. The inset images are the top views of the chips.
Figure 2. Relative light output power vs. test time characteristics of the samples.
Figure 3. I−V characteristics of (a) sample A, (b) sample B, and (c) sample C by test time.
Figure 4. Series resistance and ideality factor of (a) sample A, (b) sample B, and (c) sample C by test time.
Figure 5. (a) Junction temperature and (b) thermal resistance of the samples by test time.
Figure 6. FLIR image of sample C at (a) initial, (b) 100 h, (c) 200 h, and (d) 500 h.
