Lead-zirconate-titanate based metal/ferroelectric/high-K/semiconductor (M/Fe/High-K/S) gate stack for non-volatile memory applications

ABSTRACT

We have investigated the electrical characteristics of Metal/Ferroelectric/High-k/Si capacitor structures using sputtered Lead-Zirconate-Titanate (Pb[Zr_0.35Ti_0.65]O₃ or PZT) and HfO₂ thin films as ferroelectric and high-k material respectively. C-V, I-V characterization has been carried out to investigate the memory window and the leakage characteristics. The dependence of the memory window and leakage current on the buffer layer thickness and device annealing temperature has been studied. X-Ray diffraction (XRD) data demonstrate crystallization of HfO₂ film and increase in defects in the PZT film after N₂ annealing in the temperature range of 600°C–700°C. The maximum memory window of 6.8 V is observed in the M/Fe/High-k/S structure with 8 nm buffer layer as compared to the 2.3 V in the M/Fe/S structure, annealed at the same temperature i.e. 500°C. This device is observed to be capable of handling the voltage of 38 V before breakdown as compared to the 17 V in M/Fe/S structure. The leakage current density of the order 10⁻⁶ A/cm² is observed for the voltage sweep of +20 V.

KEYWORDS:

• Ferroelectric
• high-K dielectric
• sputtering
• XRD

Acknowledgments

The authors would like to express their sincere thanks to Prof. Somenath Biswas, Director for his constant support and encouragement. Thanks are also due to Mr. Upendra kashniyal and Mr. Pramod Narayan Tripathi, technical staff for their assistance.