Abstract
The software implementations of the systolic array simulator that closely matches the hardware and software designs of [KaEv 96] and [EvKa 99] are presented.
In addition to the general operation of the software [Ka 99], several applications are implemented in order to show that the designed architecture is capable of successfully carrying out neural processing
∗Jasmin Syntec Ltd, Bulwell, Nottingham.
†Corresponding author.
∗Jasmin Syntec Ltd, Bulwell, Nottingham.
†Corresponding author.
Notes
∗Jasmin Syntec Ltd, Bulwell, Nottingham.
†Corresponding author.