Mitigation for single event coupling delay

Abstract

With advances in CMOS technology, circuits are increasingly more sensitive to transient pulses caused by single event particles. It has been predicted that the majority of the observed radiation induced soft failures in technologies below 65 nm will be because of transients that will occur in combinational logic (CL) circuits. Researchers mostly consider single event transients as the main source for CL related radiation-induced soft errors. However, for high reliability applications such as avionics additional sources need to be included in reliability analysis. In this work, we report a new error mechanism named ‘single event crosstalk delay’, investigate the vulnerability of recent technologies to these delay effects and then propose hardening techniques for single event crosstalk delay. Results are demonstrated using HSpice simulations with interconnect and device parameters derived in 130, 90 and 65 nm technology.

Keywords:

• single event effects
• crosstalk noise
• crosstalk delay
• hardening

Acknowledgement

This work was supported in part by the Research Enhancement grant from Lamar University.