Designing novel reversible BCD adder and parallel adder/subtraction using new reversible logic gates

Abstract

Reversible logic has received much attention in recent years when calculation with minimum energy consumption is considered. Especially, interest is sparked in reversible logic by its applications in some technologies, such as quantum computing, low-power CMOS design, optical information processing and nanotechnology. This article proposes two new reversible logic gates, ZRQ and NC. The first gate ZRQ not only implements all Boolean functions but also can be used to design optimised adder/subtraction architectures. One of the prominent functionalities of the proposed ZRQ gate is that it can work by itself as a reversible full adder/subtraction unit. The second gate NC can complete overflow detection logic of Binary Coded Decimal (BCD) adder. This article proposes two approaches to design novel reversible BCD adder using new reversible gates. A comparative result which is presented shows that the proposed designs are more optimised in terms of number of gates, garbage outputs, quantum costs and unit delays than the existing designs.

Keywords:

• reversible logic
• ZRQ gate
• NC gate
• reversible BCD adder
• HNG gate

Acknowledgements

This study is supported by the National Natural Science Foundation of China under grant no. 61065002, the Foundation of Talent of Jinggang of Jiangxi Province under grant no. 20112BCB23014, Project of International Cooperation and Exchanges of Jiangxi Province under grant no. 20112BDH80007, Project of International Cooperation and Exchanges of Nanchang City.