Design and implementation of novel multilevel inverter with full DC-utilization

ABSTRACT

This paper presents a novel single-source transformer-based nine-level (9 L) inverter configuration. The design incorporates a three-level neutral-point-clamped (3 L NPC) inverter, a 3-L full bridge, and a transformer to produce 9 L output voltage levels. In particular, one of the 2 L legs in the full bridge is common among the transformer and the load. The proposed structure minimises the components compared to existing transformer-based nine-level inverters. Thus, the suggested inverter volume, cost, and complexity are minimised. Furthermore, a pulse width modulation method has been developed to generate the necessary gating pulses for the proposed inverter. Additionally, a complete comparison study illustrates the enhanced performance of the suggested architecture. The validity of the suggested 9 L inverter is assessed by performing MATLAB simulations and using a scaled prototype. The results obtained from the simulations and experimental tests are then presented and analysed. A clear correlation was observed between the simulation and the hardware results.

KEYWORDS:

• Inverter
• transformer
• PWM inverter
• multilevel inverter

Acknowledgements

This work was supported by the Vision Group on Science and Technology (VGST), Department of Electronics, Information Technology, Biotechnology and Science & Technology, Government of Karnataka, under Grant VGST/GRD-735/2021-22/286.

Disclosure statement

No potential conflict of interest was reported by the author(s).