Scheduling complex job shops using disjunctive graphs: A cycle elimination procedure

Wafer fabrication is the most complex phase in the semiconductor manufacturing process. Semiconductor wafer fabrication facilities (wafer fabs) contain re-entrant product flow through machines operating in parallel. Some of these machines incur sequence-dependent set-ups, while others are capable of processing multiple jobs in batches. This complex job shop can be modelled as a disjunctive graph, and then scheduled using a modified Shifting Bottleneck heuristic. The existence of the batch-processing machines in the complex job shop creates the potential for cyclic schedules to be produced by the modified Shifting Bottleneck approach, primarily due to the existence of dummy batching nodes and delayed precedence constraints. We propose a cycle elimination procedure to assist in maintaining schedule feasibility during the modified Shifting Bottleneck procedure.