Capacity planning with reconfigurable kits in semiconductor test manufacturing

Abstract

To test an integrated circuit (IC) product, both a tester and qualified kits are simultaneously needed. One kit usually consists of six or seven components and is somewhat like a fixture. A remarkable amount of investment will be saved if one allows kit reconfigurations and purchase individual components instead of using entire kits. Unfortunately, this approach of the reconfigurable kit also increase exponentially the complexity of kit management and thus capacity planning due to intricate {product, tester, kit, component} qualification relationships. The paper describes the Automated Capacity Allocation System (ACAS) developed at Intel Shanghai for generating an optimal capacity and kit-allocation plan for a 9-week horizon. It performs optimization at the component level using Mixed-Integer Programming (MIP) technology. High Buffer Formulation and Tight Workload Formulation are introduced to determine the number of kits needed to guarantee a feasible capacity plan. Detailed analyses of parameter setting, objective prioritizing and formulation comparison were also conducted. With the implementation of the ACAS at Intel, we have already realized millions of dollars in savings from kit purchasing and about 90% man-hour savings in the capacity planning.

Keywords:

• Semiconductor manufacturing
• Capacity planning
• Mixed-integer programming
• Kit

Acknowledgements

The authors thank the anonymous reviewers for constructive feedback. The project was the recipient of an Intel PD Recognition Award. The authors thank BIAN Cheng Gang (Intel PD1 Factory Manager), Steven Jiao (Intel PD1 Engineering Manager) and Yvonne Yeoh (Intel PD1 Planning Manager) for coaching and support. This project was funded by the Intel Higher Education Program and the National Science Foundation of China under contract 50375082. Their support is very much appreciated. The authors also thank Bill Campbell (Operations Research Group, Amazon.com) and Lance Solomon (Operations Decision Support Technology Group, Intel) for help on ILOG™ consulting. Thanks also to the technical staff members at Intel Shanghai, especially Qi Li, Simon Chen and Marky Mai, for their great contribution in modelling, system development and implementation. Ther authors thank Sean Sweat (Columbia University) for proofreading. A preliminary version of this paper was published in the IEEE International Conference on Automation Science and Engineering (2005). Given the sensitive and proprietary nature of the semiconductor environment, normalized performance data were used throughout.