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Original Articles

Prioritising production and engineering lots in wafer fabrication facilities: a simulation study

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Pages 3105-3125 | Received 11 Aug 2009, Accepted 08 Mar 2010, Published online: 20 May 2010
 

Abstract

Due to the high cost of equipment, most semiconductor wafer fabrication facilities process both regular production lots which are shipped to customers and engineering lots that support product and process development efforts. The different objectives of the engineering and production organisations render the problem of allocating equipment capacity between these different types of lots a difficult and often contentious problem. In this paper we explore the impacts of several different policies for allocating resources to production and engineering work on the shop floor using a scaled-down simulation model of a wafer fabrication facility. Our results indicate that the availability and flexibility of engineering resources can affect the performance of scheduling policies in quite different ways. We conclude that this problem needs to be viewed in a broader context than that of a shop floor scheduling issue, including the level of available engineering resources, their degree of cross-training and the manner in which engineers are allocated to different projects.

Acknowledgements

The authors would like to thank Mr. Brian Kelly of Intel for his advice and suggestions.

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