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ABSTRACT
In this paper, an automatic direct digital design approach for compensators is presented to achieve a lookup table proportional – integral – derivative controller. Additionally, a correlation-based stability margin monitor with adaptive sliding window smoothing is proposed to increase the identifiable range for bandwidth detection. The proposed automatic compensator design approach meets the expected phase margin and crossover frequency and considers limit-cycle oscillation conditions throughout the design process. The digital controller with the direct digital design was implemented on a field programmable gate array to validate the approach and alternative design capabilities. Experimental results show that the direct digital design yields a higher crossover frequency than digital redesign. The best transient response performance can be obtained if a proper integral gain is designed. The digital controller with ASWS was fabricated using the TSMC 1P6M 0.18-μm standard CMOS process. Further experimental results show that the proposed ASWS provides a significantly more accurate identified frequency response by using narrow windows at low frequencies and expansive windows at high frequencies.
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Nomenclature
| ASWS | = | adaptive sliding window smoothing |
| a, b, k | = | coefficients |
| DPWM | = | digital pulse-width modulator |
| d[n] | = | digital duty cycle command |
| e[n] | = | error signal |
| fc | = | crossover frequency |
| fs | = | switching frequency |
| GM | = | gain margin |
| Gcd | = | compensator transfer function |
| Gvd | = | control-to-output transfer function |
| h[n] | = | discrete-time impulse response |
| Kp | = | proportion gain |
| Ki | = | integration gain |
| Kd | = | derivative gain |
| LCO | = | limit-cycle oscillation |
| m | = | gain |
| PM | = | phase margin |
| PID | = | proportional – integral – derivative compensator |
| PRBS | = | pseudo-random binary sequence |
| qDPWM | = | the minimum DPWM resolution |
| Ruv | = | the cross-correlation between the input test signal and output voltage |
| Ruu | = | the autocorrelation of the input test signal |
| T | = | closed-loop gain |
| u[n] | = | the input test signal |
| Vo[n] | = | the output voltage |
| VREF[n] | = | the reference voltage |
| Vq,ADC | = | the minimum ADC quantization |
| v[n] | = | the disturbance |
| y[n] | = | the sampled output voltage |
Disclosure statement
No potential conflict of interest was reported by the author(s).