Variability Analysis of Stochastic Parameters on the Electrical Performance of On-Chip Current-Mode Interconnect System

ABSTRACT

Current-mode signalling scheme is one of the prominent solutions for high-speed and high data rate communication in global on-chip interconnects. Advancements in nanofabrication processes and housing of billions of transistors on a single silicon chip have made process-induced variations in transistors and interconnects quite significant. Analysis of parameter variations has become an important step in predicting the reliability and addressing various electronic circuit design issues in nanoscale regimes. The present paper evaluates the stochastic parameters variability on the electrical performance of on-chip current-mode interconnect system. Both transistor and interconnect variability effects are analyzed. Interconnect is modelled by an equivalent distributed line model and is driven by a current-mode driver. The impact of variability is assessed via parametric, process corner and Monte–Carlo analyses. The variability analysis is carried out for single as well as coupled 2-Line, 3-Line and 5-Line interconnect structures. Furthermore, the impact of individual process parameter variability in current-mode interconnect system has been investigated using statistical techniques namely Taguchi design of simulation scheme, ANOVA and Rank table.

KEYWORDS:

• ANOVA
• Crosstalk
• Current-mode signalling
• Integrated circuits
• Interconnects
• SPICE
• Taguchi
• Variability

ACKNOWLEDGEMENTS

The authors sincerely acknowledge with gratitude the technical and financial support received from the Department of Science and Technology–Science and Engineering Research Board (DST-SERB), GoI through Start-Up Research Grant for Young Scientists (Ref. No.: YSS/2015/001122/ES).

Additional information

Notes on contributors

Yash Agrawal

Yash Agrawal received B.E. Degree in Electronics and Communication Engineering from Kavikulguru Institute of Technology, Ramtek, Maharashtra, India, in 2009 and M.Tech. Degree in VLSI Design Automation and Techniques from National Institute of Technology, Hamirpur, Himachal Pradesh, India, in 2012. He has submitted his Ph.D. Thesis at NIT, Hamirpur in August 2016, HP. Presently, he is working as Assistant Professor at DA-IICT Gandhinagar, Gujarat. His current research interests include design techniques and modelling of high-speed on-chip VLSI interconnects. He achieved university rank during his Bachelor's degree. He achieved the third place in All India Mentor Graphics design contest held at Bangalore, India in 2011. He has been the chairman and awarded with best forum member of IETE Students’ Forum at KITS Ramtek, Nagpur Division during 2008–2009. He has also been awarded first rank in various national and inter-college level paper presentations. He is a student member of IEEE.

E-mail: [email protected]

Rajeevan Chandel

Rajeevan Chandel received B.E. degree in Electronics and Communication Engineering from Thapar University Patiala, India, in 1990. She is a double gold medalist of Himachal Pradesh University, Shimla, India, in Pre-University and Pre-Engineering in 1985 and 1986, respectively. She received M.Tech. degree in Integrated Electronics and Circuits from Indian Institute of Technology (IIT), Delhi, India, in 1997. She was awarded Ph.D. degree from IIT Roorkee, India, under QIP scheme of Govt. of India in 2005. Dr Chandel joined the Department of Electronics and Communication Engineering, NIT Hamirpur, HP India, as a lecturer in 1990, where presently she is working as a professor and has been the Head of the department twice. She has five MHRD, MCIT sponsored projects to her credit from the Govt. of India. She has over 50 research papers in international and national journals of repute and over 75 in conferences. Her research interest includes electronics circuit modelling and low-power VLSI design. She is a Fellow of IETE(I), Member of IEEE and Life Member of ISTE(I) and ISSS.

E-mail: [email protected]

Rohit Dhiman

Rohit Dhiman received B.Tech. degree in Electronics and Communication Engineering from H.P.U., Shimla, India in 2007. He completed his M.Tech. in VLSI Design Automation and Techniques from NIT Hamirpur, HP, India in 2009. He was awarded the Ph.D. degree from NIT Hamirpur in 2014. Presently, Dr Rohit Dhiman is working as an Assistant Professor in E&CE Department, NIT Hamirpur. He has over 20 research papers in international journals of repute and conferences to his credit. His research interests include device and circuit modelling for low-power VLSI design.

E-mail: [email protected]