Design of Low Noise, Flat Gain CMOS-based Ultra-wideband Low Noise Amplifier for Cognitive Radio Application

ABSTRACT

Cognitive radios are smart Radio Frequency (RF) communication system that senses the RF spectrum which allocates a less crowded spectrum to the user abstaining the interference of other spectrum users while confirming to Federal Communications Commission regulation. In this work, the design of an ultra-wideband low noise amplifier (50 MHz–10 GHz) for cognitive radio application adapting noise cancelling and g_m-boosting techniques is presented. With the integrated noise cancelling and g_m-boosting technique, the proposed low noise amplifier is able to achieve an ultra-wideband frequency response in reference to the gain and noise figure performance. Simulation result shows that the input and output matching are better than −10 dB and −7.1 dB with a gain of 11.5 ± 1.5 dB, noise figure of 3.5 ± 0.5 dB and a RF input third order intercept point ranging from −10.4 to −5.3 dBm in a frequency span from 50 MHz to 10 GHz on a complementary metal-oxide semiconductor (CMOS) 0.13 μm platform. The designed architecture occupies 1.19 mm² chip area and consumes 24.2 mW of DC power from 1 V of DC supply headroom.

KEYWORDS:

• CMOS
• Cognitive radio
• g_m-Boosting
• Low noise amplifier (LNA)
• Noise cancelling
• Ultra wideband

DISCLOSURE STATEMENT

No potential conflict of interest was reported by the authors.

Additional information

Funding

This work is supported by Motorola Foundation Grant [grant number PV001-2014].

Notes on contributors

Y.Y. Tey

Y. Y. Tey received his BSc (electrical engineering) degree from University Malaya, Kuala Lumpur, Malaysia, in 2013. He is currently pursuing his Master degree in University Malaya with the research interest of analogue IC design specialized in ultra-wideband low noise amplifier.

E-mail: [email protected]

H. Ramiah

H. Ramiah received his BE, MS and PhD degrees in electrical and electronics engineering, majoring in analog and digital IC design from University Science Malaysia, Penang, Malaysia, in 2000, 2003 and 2009, respectively. In the year 2003, he was with SiresLabs Sdn. Bhd, Cyberjaya, Malaysia, working on audio pre-amplifier for MEMs ASIC application and the design of 10Gbps optical transceiver solution. In year 2002, he was with Intel Technology Sdn. Bhd., Penang, Malaysia, performing high frequency signal integrity analysis for high speed digital data transmission and developing Matlab spread sheet for Eye diagram generation, to evaluate signal response for FCBGA and FCMMAP packages. Currently, he is an associate professor in the Department of Electrical Engineering, University Malaya. He was the recipient of Intel Fellowship Grant Award, from 2000 to 2006. His research work has resulted in several technical publications. His main research interest includes analog integrated circuit design, RFIC design and VLSI system design. He is a senior member of IEEE (SMIEEE).

E-mail: [email protected]

Norlaili Mohd. Noh

Norlaili Mohd. Noh received her BEng in electrical engineering from Universiti Teknologi Malaysia (UTM) in 1987, and M Sc and PhD degrees from Universiti Sains Malaysia (USM) in 1995 and 2009, respectively. She is currently senior lecturer with the School of Electrical and Electronic Engineering USM. Her specialization is microelectronic (Analog and RF Circuit Design). Her current research interests include analog and RF circuit design – low noise amplifiers, noise measurement, CMOS and MEMS integration.

E-mail: [email protected]