High Performance CNFET-based Ternary Full Adders

ABSTRACT

This paper investigates the use of carbon nanotube field effect transistors (CNFETs) for the design of ternary full adder cells. The proposed circuits have been designed based on the unique properties of CNFETs such as having desired threshold voltages by adjusting diameter of the CNFETs gate nanotubes. The proposed circuits are examined using HSPICE simulator with the standard 32 nm CNFET technology. The proposed methods are simulated at different conditions such as different supply voltages, different temperature, and operational frequencies. Simulation results show that the proposed designs are faster than the state of the art CNFET-based ternary full adders.

KEYWORDS:

• CNFET
• Full adder
• High speed
• Multiple valued logic (MVL)
• Nanotechnology
• Ternary arithmetic circuits

DISCLOSURE STATEMENT

No potential conflict of interest was reported by the authors.

Additional information

Notes on contributors

Fazel Sharifi

Fazel Sharifi received his BSc degree from Shahid Bahonar University in computer engineering and the MSc degree in computer architecture from Shahid Beheshti University in 2007 and 2010, respectively. He is currently a PhD candidate in computer architecture at Shahid Beheshti University, Tehran, Iran. He is working on VLSI and circuit design based on nanotechnology.

E-mail: [email protected]

Atiyeh Panahi

Atiyeh Panahi received the BSc degree in computer engineering from the Sharif University of Technology, Iran. She is currently working towards the MS degree in computer architecture engineering at Shahid Beheshti University of Iran. Her research interests include VLSI and nanotechnology.

E-mail: [email protected]

Mohammad Hossein Moaiyeri

Mohammad Hossein Moaiyeri received his PhD degree in computer architecture from Shahid Beheshti University, Tehran, Iran in 2012. He is currently an assistant professor in Faculty of Electrical and Computer Engineering of Shahid Beheshti University. His research interests mainly focus on nanoelectronics circuitry specially based on CNFET, QCA and SET, low-power VLSI design, VLSI implementation of MVL and fuzzy logic and mixed-mode circuits.

E-mail: [email protected]

Hojjat Sharifi

Hojjat Sharifi received his BSc degree from Shahid Bahonar University in computer hardware engineering and the MSc degree in computer architecture from Amirkabir University of Technology in 2005 and 2008, respectively. He is currently a lecturer in Faculty of Computer Engineering of Vali-e-Asr University of Rafsanjan. His research interests include VLSI design, interconnection network, nanotechnology, and optical-based circuits.

E-mail: [email protected]

Keivan Navi

Keivan Navi received MSc degree in electronics engineering from Sharif University of Technology, Tehran, Iran in 1990. He also received the PhD degree in computer architecture from Paris XI University, Paris, France, in 1995. He is currently a professor in Faculty of Electrical and Computer Engineering of Shahid Beheshti University. His research interests include nanoelectronics with emphasis on CNFET, QCA and SET, computer arithmetic, interconnection network design and quantum computing and cryptography.

E-mail: [email protected]