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Abstract
Demand for transmission using short block length messages has been increased recently in applications including satellite communication, mobile communication, wireless sensor networks, and machine type communications. Unacceptable performance degradation associated with the short block length Turbo codes restricted its use for applications requiring communication with short block length codewords. A novel performance improved reliability-based decoding algorithm for short block length Turbo codes has been formulated and proposed by the authors. The proposed algorithm has a coding gain of 2.45 dB at a BER of 10−3 over AWGN channel with BPSK modulation for a code rate of . The algorithm has a channel adaptive complexity and has shown nearly 82% reduction in the decoding time complexity for the rate
Turbo code at 3 dB SNR. As an extension of this earlier work, a detailed performance analysis of the algorithm on different Turbo codes has been carried out. A four-state Turbo encoder has been used to bring out the key aspects of the level based algorithm which is driven by reliability as the key parameter. The formulated algorithm has been applied to different Turbo encoder structures namely 3GPP LTE and CCSDS Turbo codes and a detailed analysis has been carried out in this paper. Simulation results show a significant improvement in the error correction performance of short block length Turbo codes. The algorithm also leads to a marked improvement in time complexity at high SNRs. The algorithm is an attractive solution for applications requiring communication with short block lengths.
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Notes on contributors
P. Salija
P Salija obtained her BTech degree in 2011 and MTech degree in 2013. She is currently a senior research fellow and is pursuing doctorate in the department of ECE at Amrita School of Engineering. Her current research interest is error control coding. Corresponding author. Email: [email protected]
B. Yamuna
B Yamuna received her ME, in VLSI design in 2004, and PhD in error control coding in 2013 from Amrita School of Engineering, Amrita Vishwa Vidyapeetham. She is working as associate professor in the Dept. of ECE at Amrita School of Engineering. She has published and presented papers in International journals and conferences. She has reviewed papers for international and national conferences, and chaired sessions. Her current research interests include coding for reliable communication, VLSI architectures for communication systems, and cryptosystems based on error control codes. She is a member of ISTE and IETE. Email: [email protected]
T. R. Padmanabhan
T R Padmanabhan obtained his master degree in 1968 and PhD from IIT Kharagpur in 1974. He is currently an adjunct professor in the Department of ECE, at Amrita Vishwa Vidyapeetham, Coimbatore. He taught at the IIT Kharagpur, before doing Research and Development for private companies for several years. He is a Senior Member of the IEEE and a Fellow of both the Institution of Engineers (IEI) and the Institution of Electronics and Telecommunication Engineers (IETE). He has published books with Wiley, Tata McGraw-Hill, and Springer Verlag. Email: [email protected]
Deepak Mishra
Deepak Mishra received the BE degree in electronics and communication from the Govt G B Pant Engineering College, Uttaranchal, in 2001, MTech degree in communications systems from Department of Electronics Engineering, IIT, BHU in 2003 and PhD degree also from IIT, BHU on the topic “Joint Source Channel Coding for Deep Space Application”, in the year 2012. He joined SAC, ISRO in year 2003. During this tenure, He was involved in various subsystems development of various ISRO projects. He is currently working as a scientist/engineer-SF. He has more than 40 papers in various international journals and conferences. Email: [email protected]