Design of a Monolithic Inductor and Its Influence on the Oscillator Design

Abstract

Reliability of a wireless communication system depends on the performance metric of the oscillators employed. In this paper, we have discussed the commonly used oscillator architectures, their equivalent RLC circuits and the influence of the inductor performance on the oscillator design. Inductors designed for the oscillators are fabricated in 180 nm CMOS process. Inductors are implemented with 20 k$\text{Å}$ top metal layer of the P1M6 layer architecture. Two-turns twisted and 3-turns spiral shape inductors are fabricated with and without the substrate shield, respectively. Twisted shape inductor with the floating substrate shield has higher Q-factor due to low substrate loss. To further validate the performance of inductors, digitally controlled oscillators (DCO's) are designed around the inductors and simulated for its phase noise performances. Inductors are designed on a (lossy) substrate with a resistivity of 2 Ω-cm. The twisted shape inductor has a Q-factor of 5.23 at the operating frequency of 1.8 GHz for the inductance value of 2.8 nH and has a self-resonance frequency (SRF) of 10 GHz. Whereas spiral shape inductor achieves the maximum Q-factor of 1.18 for the inductance value of 3.4 nH with SRF of 12.5 GHz. DCO's implemented with the designed twisted and spiral shape inductors has the phase noise of $-107$ and $-92$ dBc/Hz, respectively, at an offset of 1 MHz from 1.8 GHz of the center frequency.

Keywords:

• Adjacent channel interference
• Digitally controlled oscillator (DCO)
• Phase noise
• Q-factor
• Self-resonating frequency (SRF)
• Voltage controlled oscillator (VCO)

Disclosure statement

No potential conflict of interest was reported by the authors.

Additional information

Notes on contributors

Atul Thakur

Atul Thakur received the MTech degree from Thapar University, Patiala, India. Currently, he is working towards his PhD degree at IIT Delhi, India. His research interest includes analog circuit design and low-noise low-power RFIC design for asynchronous wireless communication system. Corresponding author. Email: [email protected]

Shouri Chatterjee

Shouri Chatterjee received the BTech degree in electrical engineering from the Indian Institute of Technology, Madras, in 2000, and the MS and PhD degrees in electrical engineering from Columbia University, New York, in 2002 and 2005, respectively. From 2005 to 2006, he was a design engineer in the wireless division at Silicon Laboratories Inc., Somerset, NJ. Since November 2006 he has been with the faculty of the Department of Electrical Engineering of the Indian Institute of Technology, Delhi, India. His research interests include filter design, ultra low power circuits for energy scavenging, and wireless front-ends for millimeter wave radios. Email: [email protected]