Abstract
Thyristor controlled series capacitor (TCSC) is placed in transmission line to enhance its power transfer capability. However, several relaying methods experience the challenges of voltage and current inversion, nonlinear behavior of MOV and sub-synchronous oscillations in the presence of TCSC. Furthermore, power swing causes unwanted trip and severely affects the protection schemes due to the modulation of relaying signals for a TCSC-compensated line. Even, fault detection is not possible due to power swing blocking (PSB) element which blocks distance relay when impedance trajectory lies inside the relay trip zone. To overcome the problem associated with TCSC and PSB operation within the duration of power swing, a fault identification technique, based on multiplication of Teager Kaiser Energy Operators (TKEOs) of negative sequence (NS) current and voltage phasors, is proposed. It has been tested in numerous fault cases in various system conditions and compared with the existing schemes. The proposed technique can be implemented with a threshold which is a major advantage of it. Availability of local end relay voltage and current data make the scheme reliable and fast. To validate the proposed scheme, a WSCC 9-bus system with consideration of 400 kV, 50 Hz has been simulated and tested using EMTDC/PSCAD software.
Additional information
Notes on contributors
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Himanshu Shekhar
Himanshu Shekhar received his BTech in electrical engineering from West Bengal University of Technology, India and masters in power engineering from Jadavpur University, India. He is currently pursuing PhD in electrical engineering from National Institute of Technology Jamshedpur, India. His research interest is power system protection.
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Jitendra Kumar
Jitendra Kumar received his MTech in power systems from National Institute of Technology Kurukshetra, India and the PhD degree in electrical engineering from the Indian Institute of Technology Roorkee, Uttarakhand, India. Currently, he is an assistant professor in the Department of Electrical Engineering, National Institute of Technology, Jamshedpur, India. His research interests include digital protection of power system, advanced protection algorithm design in the presence of FACTS, and micro-grid area, deregulation. Email: [email protected]
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Avinash Nayak
Avinash Nayak received his BTech in electrical engineering from National Institute of Technology Jamshedpur, India. His research interest is power system protection. Email: [email protected]