An Efficient Quantum-Dot Cellular Automata Full Adder Based on a New Convertible 7-Input Majority-Not Gate

Abstract

Quantum-dot cellular automata (QCA) is one of the most promising emerging paradigms offered for substitution of ongoing MOSFET technology. In order to qualify the QCA technology, all the previously designed circuits, either combinational or sequential, have been redesigned using QCA cell interaction. In this way, adder circuits, which play the most significant role in the arithmetic structures, have been extensively explored. In this paper, in the first step, a new single-layer 7-input majority-not gate is presented. This gate can be easily converted to a 5- or 7-input majority gate to form diverse QCA circuits. The extensive energy dissipation and structural evaluations over the proposed 5-input majority gate and the best previously published ones prove its prominent performance. In the next step, this well-shaped gate is leveraged as a basilar structure for implementation of an ultra-high speed QCA full adder. With respect to the counterpart designs, our proposed one surpasses all the previously published full adders in different points of views such as computation speed and number of consumed cells. QCADesigner and QCAPro tools are used as popular simulation engines to authenticate the circuit functioning and to measure energy dissipation, respectively.

KEYWORDS:

• Five-input majority gate
• Full adder
• Power dissipation
• Seven-input majority-not gate
• QCAPro
• Quantum-dot cellular automata

Additional information

Notes on contributors

Hossein Mohammadi

Hossein Mohammadi received the MSc degree in computer architecture from Science and Research Branch of Islamic Azad University, Tehran, Iran, in 2011 and BSc degree in computer hardware from Isfahan University, Isfahan, Iran in 2007. He is currently a PhD candidate in computer architecture in Science and Research Branch of Islamic Azad University, Tehran, Iran. His research interests include nanoelectronics with emphasis on QCA and computer architecture. Email: [email protected]

Keivan Navi

Keivan Navi received the PhD degree in computer architecture from Paris XI University, Paris, France, in 1995 and the MSc degree in electronics engineering from Sharif University of Technology, Tehran, Iran in 1990. He is currently professor in Faculty of Electrical and Computer Engineering of Shahid Beheshti University and also a senior member of IEEE. He is in charge of the Nanotechnology and Quantum Computing Laboratory (NQC Lab). His research interests include nanoelectronics with emphasis on CNFET, QCA and SET, computer arithmetic, interconnection network design and quantum computing and cryptography.

Mehdi Hosseinzadeh

Mehdi Hosseinzadeh received the BSc degree from the Dezful Branch, Islamic Azad University, Dezful, Iran, in 2003, and the MSc and PhD degrees in computer engineering from the Science and Research Branch, Islamic Azad University, Tehran, Iran, in 2005 and 2008, respectively. He is currently assistant professor with the Science and Research Branch, Islamic Azad University. His current research interests include computer arithmetic and network security. Email: [email protected]