HEVC Video Quality Enhancement Using Deep Learning with Super Interpolation and Laplacian Filter

Abstract

Enhancing video quality is a vital area of research that has piqued the interest of academia and industry alike. The High-Efficiency Video Coding (HEVC) compressed videos suffer from significant quality loss, especially at low bit rates. As a result, the decoder must improve the image quality of HEVC videos. Deep Learning with Super Interpolation based Super Resolution (DLSI-SR) and Laplacian Filter (LF) method is proposed to eliminate artifacts. A Multi-Layered Deep Convolutional Neural Network (ML-DCNN) with LF has been introduced to reduce the artifacts quickly in compressed video and increase the subjective video quality. The quality of Low-Resolution (LR) frames can be effectively enhanced using Super Interpolation and Laplacian filter. The Edge orientation analysis is performed on various external training video frames during the training stage. The LR video frame is up-sampled and interpolated using the Super Interpolation algorithm during the upscaling phase. The interpolated frame is then submitted to edge detection using a Canny Edge detection algorithm for frame smoothing. Using local Laplacian filter, the reconstructed high quality video frame is sharpened with an edge preservation approach. The simulation results of the proposed DLSI-SR method shows higher performance in terms of PSNR and SSIM with less processing time in comparison with the existing approaches. The experimental results show that the proposed approach achieves a maximum PSNR of 42.5 dB (enhanced by 2.56 dB) and produced an SSIM improvement of 0.948 (enhanced by +0.022) as compared to the existing approaches.

Keywords:

• Super Interpolation
• Laplacian Filter
• Video quality enhancement
• HEVC
• Deep Learning

DISCLOSURE STATEMENT

There is no potential conflict of interest.

Additional information

Notes on contributors

G. Sheeba

G Sheeba presently working as assistant professor in Government College of Engineering Srirangam, Trichy, Tamil Nadu, India. She has more than 11 years of teaching experience in the Department of Electronics and Communication Engineering. She is currently pursuing PhD degree from Anna University, Tamil Nadu, India. Her area of research includes video processing, VLSI signal processing and wireless communication systems.

M. Maheswari

M Maheswari presently working as professor in K Ramakrishnan College of Engineering, Trichy, Tamil Nadu, India. She has more than 21 years of teaching experience as lecturer/asst. professor/professor in the Department of Electronics and Communication Engineering. She has published more than 30 papers in reputed international journals/international conferences and national conferences. Her research area includes VLSI based system design, system design on reconfigurable device and ASIC, design of custom topology for network-on-chip, design of error control codes for network-on-chip. Email: [email protected]