Neural Network-based Fast and Intelligent Signal Integrity Assessment Model for Emerging MWCNT Bundle On-Chip Interconnects in Integrated Circuit

Abstract

At nanometer technology nodes, the efficient signal integrity and performance assessment of vast on-chip interconnects are crucial and challenging. For a long time, copper (Cu) has been used as an interconnect material in integrated circuits (ICs). However, as heading towards lower technology nodes, Cu is becoming inadequate to satisfy the requirements for high-speed applications due to its physical limitations. To mitigate this issue, a multiwall carbon nanotube bundle (MWCNTB) is proven to be a better replacement for Cu. Hence, the current work innovatively focuses on modeling, analysis, and performance evaluation of MWCNTB interconnects at 32 nm technology nodes using various machine learning (ML) and neural network (NN) based techniques for signal integrity assessment and fast computation of on-chip interconnect design. Based on the results obtained by comparing the different performance parameters, it is envisaged that NN-based ADAM technique leads to the best-suited model. The developed model is fruitful in evaluating the output performance of the system, such as power-delay-product (PDP), performing parametric analysis, and predicting optimum input design parameters of the driver-interconnect-load (DIL) system. This work utilizes HSPICE and Python electronic design automation tools for its implementation.

Keywords:

• Machine learning (ML)
• Multiwall carbon nanotube bundle (MWCNTB)
• Neural network (NN)
• On-chip interconnects
• Signal integrity

DISCLOSURE STATEMENT

No potential conflict of interest was reported by the author(s).

Additional information

Notes on contributors

Gulafsha Bhatti

Gulafsha Bhatti received the BE degree in electronics and communication engineering from Government Engineering College, Dahod, India and ME degree in signal processing and VLSI from Vishwakarma Government Engineering College, Chandkheda, India. She is currently pursuing PhD at the Department of Electronics and Communication, Dhirubhai Ambani Institute of Information and Communication Technology, Gandhinagar, India. Corresponding author. Email: [email protected]; [email protected]

Takshashila Pathade

Takshashila Pathade received her BE degree in electronics engineering from Shyamlal College of Engineering, Udgir (Dist. Latur), India and ME degree in VLSI and embedded systems from Sinhgad College of Engineering, Vadgaon, Pune, India. She is currently pursuing PhD from Dhirubhai Ambani Institute of Information and Communication Technology, Gandhinagar, Gujarat, India. She has nearly 10 years of experience in academics and industry. Her areas of interest are digital logic design, VLSI design, digital signal processing, nanotechnology, etc. Email: [email protected]

Yash Agrawal

Yash Agrawal is currently faculty at DAIICT Gandhinagar, Gujarat. He received his BE degree in E&CE from Nagpur University, India, in 2009. He acquired his MTech and PhD degrees in VLSI design automation and techniques from National Institute of Technology, Hamirpur, Himachal Pradesh, India, in 2012 and 2016, respectively. He has done his postdoctorate in NoC design from University of Rennes, France. His current research interests include nanotechnology, system design for bio-medical applications, flexible electronics, image processing using FPGA architectures, modeling and analysis of nanodevices and interconnects. He has been awarded with prestigious IETE – K S Krishnan Memorial Award-2017 for the best system oriented research paper. He achieved third place in All India Mentor Graphics design contest held at Bangalore, India in 2011. He organized various workshops and conferences. He has several publications in book chapters, transactions journals along with several national and international reputed conferences. Email: [email protected]

Vinay Palaparthy

Vinay Palaparthy is currently working as assistant professor in Department of Information and Communication Technology, DAIICT, Gandhinagar, India. He is a principal investigator for the system design laboratory at DAIICT. He received MSc degree with first rank from Nagpur University, Nagpur, India and PhD from Indian Institute of Technology, Bombay in 2011 and 2018, respectively. He was awarded with DST INSPIRE Fellowship for pursuing PhD degree at IIT, Bombay. He worked as a research associate in Indian Institute of Technology, Bombay before joining for doctoral degree. He published 13 papers in international journals, and 8 conferences, filed 2 patents and wrote one book chapter. He was a co-recipient of Richard Feynman Prize for the best journal paper, ICE (UK) Journal of Emerging Materials Research (2014). He is also a Co-founder of the start-up, which develops low-cost sensors for agriculture applications. He has served as an organizing committee member of international conference, ISED 202One. His current research includes MEMS/NEMS sensors, embedded system design, nano-materials focusing mainly for the agriculture sensing applications. Email: [email protected]

Bakul Gohel

Bakul Gohel has been faculty at Dhirubhai Ambani Institute of Information and Communication Technology (DA-IICT) since 2018. He completed his PhD in the field of bio and brain engineering from Korea Advanced Institute of Technology and Science (KAIST), South Korea, in 2015. He received MTech degree in the field of information technology (Spec. Bio-Informatics) from IIIT-Allahabad and his MBBS (bachelor of medicine and bachelor of surgery) degree from a government medical college, Surat, India. Earlier, he was a researcher at the Korea Research Institute of Science and Standards, South Korea, from 2015 to 2018. His current research interest lies in the field of bio-medical image and signals analysis, deep learning architecture and its applications, bio-medical instrumentation, and brain signal analysis. Email: [email protected]

Rutu Parekh

Rutu Parekh received the ME in electrical engineering from Concordia University, Canada, PhD in electrical engineering (Nanoelectronics) from Université de Sherbrooke, Canada and Postdoctoral fellowship at Centre of Excellence in Nanoelectronics, IIT Bombay in 2015. She is currently working as a Faculty at DA-IICT, India. Her research interest includes developing models, co-design methodology, and co-simulation of hybrid circuits of emerging nanoelectronic devices with CMOS technology, low voltage low power circuits, embedded systems, and IOE. She is a Member of IEEE. Email: [email protected]

Mekala Girish Kumar

Mekala Girish Kumar joined the Electronics and Communication Engineering Department in 2017, where he is currently an associate professor in TKR College of Engineering and Technology, Hyderabad. His research area in the field of VLSI, nanotechnology, 3D IC packaging system, on-chip interconnects, through silicon vias (TSV). He received PhD and MTech degrees in VLSI design automation and techniques in E&CE Department from National Institute of Technology, Hamirpur, Himachal Pradesh, India. He is reviewer of several reputed journals. He has organized workshops and was part of the organizing committee in various trainings, seminars, and conferences. He published several research papers in Springer, IEEE Transactions in Electromagnetic Compatibility, IEEE Transactions in Nanotechnology Taylor and Francis, etc. Email: [email protected]