Hardware Design and Implementation of FPGA Controlled Seven-Level Reduced Switch MLI

Abstract

The paper proposes the design of a seven-level reduced switch multi-level inverter (7LRS-MLI) topology. The design produces a seven-level staircase output waveform with fewer components (seven power switches), thus reducing the cost and area and improving the performance of the design, i.e. increasing efficiency and reducing switching loss effectively. Both symmetric and asymmetric configurations have been implemented and the results are discussed in the paper. A comparison of the proposed structure with other recent seven-level structures has been illustrated. The simulation (using MATLAB/SIMULINK software) and experimental validation of 7LRS-MLI also have been performed for R, RL load, change in load and change in a modulation index (MI). Field programmable gate arrays (FPGA) have been used for digital implementation of the switching waveforms which reduces design time and improves flexibility. For switching devices, the alternative phase opposite disposition pulse width modulation (APOD-PWM) technique is used at 500 Hz and 5 kHz. The voltage and current total harmonic distortion (THD) profiles are also computed during the simulation and experimental validation.

KEYWORDS:

• Extension
• Field programmable gate arrays
• Hardware implementation
• MATLAB (Simulink)
• Reduced switch multi-level inverter
• Renewable energy sources
• Seven-level (7L)
• Symmetric and asymmetric
• Total harmonic distortion
• Voltage ratio of DC sources (binary and ternary DC sources)

Disclosure statement

No potential conflict of interest was reported by the author(s).

Additional information

Notes on contributors

Aparna Arunkumar Gautam Lakhani

Aparna Arunkumar Gautam Lakhani received the BE (Electronics) and MTech (VLSI) from Nagpur University, India in 2004 and 2008, respectively. She is a member of IETE and a life member of ISTE. Her research areas include embedded systems, power electronics and circuit theory. She is currently a research scholar (Institute Research Fellowship) in the Department of Electrical and Electronics Engineering, BIT, Mesra, Ranchi, India. She possesses experience of 13 years in teaching and research. Corresponding author. Email: [email protected]

Vijaya Laxmi

Vijaya Laxmi was born in India in 1979. She received the BE, ME (Electrical) and PhD degrees from Birla Institute of Technology (BIT), Mesra, India in 2000, 2002 and 2010, respectively. She is a Member of IEEE and a Life Member of ISTE. Her research areas are image processing, control system and soft computing applications. She is currently professor in the Department of Electrical and Electronics Engineering at BIT, Mesra, Ranchi. She possesses experience of 19 years in teaching and research. Email: [email protected]