Abstract
Transfer and output characteristics of fully-depleted polycrystalline silicon thin film transistors, including both tail and deep acceptor-like trap states in bulk, in the above-threshold region with low drain bias are presented under low or high state density in the situation without or with interface charge, respectively. The characteristics are calculated by a simple surface-potential-based drain current model in the strong inversion region with valid bias condition explained, and 2D-device simulation. The above-threshold region is found to be divided into Regions I and II, with Vsi, indicating the channel beginning to be completely strongly-inverted and large currents, and explication of deviations between the model and simulation in Region I. The large-traps effect on the range of Region I and Vth in the high state density situation is discovered.
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Additional information
Notes on contributors
Zhen Zhu
Zhen Zhu was born in Suzhou, China, in December 1980. He received the PhD degree in microelectronics and solid-state electronics from East China Normal University, Shanghai, China, in 2011. Previously, he received the MS degree in microelectronics and solid-state electronics from Soochow University, Suzhou, China, in 2007 and the BS degree in automation from Jiangsu University, Zhenjiang, China, in 2003. His main research interest is in semiconductor devices, including device modeling, device reliability, and device characterisation.
Junhao Chu
Junhao Chu, photograph and biography were not available at the time of publication. Email: [email protected]