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Original Articles

A discrete spatial model for wafer yield prediction

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Pages 169-182 | Published online: 12 Jul 2017
 

ABSTRACT

Yield analysis is one of the key concerns in the fabrication of semiconductor wafers. An effective yield analysis model will contribute to production planning and control, cost reductions and the enhanced competitiveness of enterprises. In this article, we propose a novel discrete spatial model based on defect data on wafer maps for analyzing and predicting wafer yields at different chip locations. More specifically, based on a Bayesian framework, we propose a hierarchical generalized linear mixed model, which incorporates both global trends and spatially correlated effects to characterize wafer yields with clustered defects. Both real and simulated data are used to validate the performance of the proposed model. The experimental results show that the newly proposed model offers an improved fit to spatially correlated wafer map data.

About the authors

Hao Wang received her B.S. degree from Tianjin University in 2014. She is currently a Ph.D. candidate in the Department of Industrial Engineering at Tsinghua University. Her research focuses on statistical modelling, data analytics and quality engineering.

Bo Li is an Associate Professor in the School of Economic and Management at Tsinghua University, Beijing. He received his B.S. in B.S. in Mathematics from Peking University in 2002, and Ph.D. in Statistics form University of California, Berkeley in 2006. His research interests are large-scale complex data modeling and analysis, applied statistics, and econometrics in economics and business.

Seung Hoon Tong received a B.S. degree from Korea University in 1988, a M.S. degree from the Korea Advanced Institute of Science and Technology (KAIST) in 1991, and a Ph.D. degree from KAIST in 2006, under the sponsorship of Samsung Electronics Company Ltd., all in industrial engineering. In 1991, he joined Samsung Electronics Company Ltd., semiconductor business, where he has been engaged in the quality and reliability engineering area. His research interest is the factory integration based on manufacturing big data analytics and engineering statistics.

In-Kap Chang received B.S., M.S., and Ph.D. degrees from Seoul National University, Korea, in 1999, 2001, and 2008, respectively. He is currently working with Semiconductor Manufacturing Division of Samsung Electronics, Korea. He joined Samsung Electronics Company Ltd. in 2008. His research interests include statistical data mining, abnormal detection, sampling plans, quality assurance, and prediction for the customer failure rate in the semiconductor manufacturing process.

Kaibo Wang is a Professor in the Department of Industrial Engineering, Tsinghua University, Beijing, China. He received his B.S. and M.S. degrees in Mechatronics from Xi’an Jiaotong University, Xi’an, China, and his Ph.D. in Industrial Engineering and Engineering Management from the Hong Kong University of Science and Technology, Hong Kong. He is currently the Chair of the Quality, Statistics and Reliability (QSR) section of INFORMS, on the Editorial Review Board of Journal of Quality Technology, and also an Associate Editor for Quality Technology & Quantitative Management. His research focuses on statistical quality control and data-driven complex system modeling, monitoring, diagnosis, and control, with a special emphasis on the integration of engineering knowledge and statistical theories for solving problems from real industries. He is a senior member of ASQ, and a member of INFORMS and IIE.

Acknowledgments

The authors would like to thank the Editor-in-Chief and two anonymous referees for their valuable comments, which have helped us improve this work greatly.

Additional information

Funding

The authors are grateful to Samsung Electronics for providing financial support and sample data to this research. Dr. Wang’s research is partially supported by the National Natural Science Foundation of China under Grant No. 71471096 and the National Key Research and Development Plan (National Quality Infrastructure Project) under Grant No. 20l6YFF0204103.

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