Abstract
This paper presents silicon-on-insulation (SOI) CMOS T/R and SP4T switches with high-power handling capability. The CMOS transistors are stacked and their sources and drains are biased for the high-power handling capability. The TQ trench of 0.18-m SOI CMOS process is properly placed to improve the substrate isolation between transistors. For the T/R switch, the measured insertion loss of Tx and Rx modes are
1.1 and
1.7 dB, respectively, in Ku-band (12–18 GHz). The measured isolation between Tx and Rx ports is
24 dB in the same frequency band. To author’s knowledge, this T/R switch shows the highest input 1-dB compression point of 34 dBm in Ku-band CMOS switches. The SP4T switch operates in DC-18 GHz, and the measured insertion loss and isolation are
2.4 and
19.5 dB, respectively, with the return loss of
9.3 dB. This chip sizes are 0.11 mm
for the T/R switch and 0.12 mm
for the SP4T switch.
Notes
No potential conflict of interest was reported by the authors.