Practical lot release methodology for semiconductor back-end manufacturing

Abstract

This paper presents a new method and system that has been developed to solve production lot release problems in a discrete semiconductor back-end manufacturing environment, wherein there is always a huge product mix and a multitude of capacity constraints. The methodology is a multi-constraint based finite capacity production control mechanism to plan lot release of the desired mix of products for the semiconductor assembly and test operations. Practical lot prioritization considerations, order release policies, finite capacity constraints and a novel technique of multi-level loading pattern for minimizing machine conversion are discussed in detail. The system and methodology presented in this paper has been successfully implemented in a semiconductor back-end factory in Asia.

Keywords:

• Lot release
• Order release
• Planning and scheduling
• Finite capacity
• Semiconductor back-end

Acknowledgments

William Liu is a Senior Research Engineer at the Singapore Institute of Manufacturing Technology. He received his Bachelor degree in Mechanical Engineering and Masters degree in Aircraft Engineering from Beijing University of Aeronautics and Astronautics (BUAA) in 1987 and 1990 respectively. He is a certified CPIM (Certified in Production and Inventory Management) and CIRM (Certified in Integrated Resource Management) by the American Production and Inventory Control Society (APICS). Main research interests are production control and management, production planning and scheduling.

Tay-Jin Chua is a Research Scientist at the Singapore Institute of Manufacturing Technology. He graduated from the National University of Singapore with a BEng (Hons) degree in Mechanical and Production Engineering in 1987 and obtained his Masters of Engineering from Nanyang Technological University in 1992. He achieved certification status in the Production and Inventory Management program (CPIM) by the American Production and Inventory Control Society (APICS) in 1994 and certification status in Resource Management (CIRM) in 1996. He became a Certified Industrial Automation Consultant (CIAC) by the Singapore Industrial Automation Association (SIAA) in 1995. Since joining SIMTech he has led several industrial projects in the area of manufacturing planning and scheduling. He was appointed as the Manager for the Planning and Scheduling Application Centre (PSAC) in October 1998. The Centre has successfully completed several industrial projects for the electronics and precision engineering industries.

TianXiang Cai is a Senior Research Engineer at the Singapore Institute of Manufacturing Technology. He received his BSc in Mathematics from Peking University in 1988 and MSc in Simulation and Operations Research from the Institute of Applied Mathematics at the Chinese Academy of Science in 1991. His research interests include production planning and scheduling, application of simulation and pattern recognition.

FengYu Wang is a Research Engineer at the Singapore Institute of Manufacturing Technology (SIMTech). He received his Bachelor and Master degrees in Engineering from the North East University, China. His research interests include finite capacity planning, production scheduling, multi-site planning and scheduling, enterprise integration and supply chain management.

WenJing Yan is a Research Engineer at the Singapore Institute of Manufacturing Technology (SIMTech) working in the area of manufacturing production planning and scheduling. She received her BEng and MEng in computer application from the Taiyuan University of Technology in 1991 and 1998. Her research interests include advanced planning and scheduling, web service and artificial intelligence.