Integrated lot sizing and dispatching in wafer fabrication

Abstract

In this article, we investigate the integration of lot sizing and dispatch-related decisions for a wafer fabrication (hereafter referred to as wafer fab) facility. These decisions pertain to the operational planning and shop floor control (SFC) levels of its decision hierarchy. Our objective is to minimise output variability, which is an important and challenging issue for wafer fabrication due to the inherent dynamics and complexity of the operations involved. We propose a detailed lot-sizing model (called dynamic lot release planning (DynaLRP)) that captures wafer movement at each step of the process flow and prescribes a processing quota at these steps as well. We then design a dispatching rule called Largest-Remaining-Quota-First (LRQ) rule to drive wafer movement towards the direction prescribed by the lot-sizing model. A closed-loop control is formed by feeding the shop floor status back to the lot-sizing model and updating processing quota for each processing step on a regular basis. We have tested the effectiveness of our methodology in the simulated environment of a real-life wafer fab, and the results show that our methodology is effective in improving the wafer fab's performance while reducing output variability.

Keywords:

• production planning
• lot sizing
• shop floor control
• wafer fabrication
• integrated decision making
• output variability

Acknowledgements

This work has been supported by the Center for High Performance Manufacturing (CHPM) at Virginia Tech under CTRF Grant No. SE 2002–2003 and National Science Foundation under Grant CMMI-0856270.