Low-complexity soft-decision parallel equaliser algorithms for Chinese next-generation-high-performance AV

ABSTRACT

The goals of the Chinese next-generation-high-performance AV (C-NGHPAV) system are to efficiently utilise the precious last 100 m of the coaxial cable of China’s state administration of radio film and television (SARFT) to achieve a gigabit transmission rate. This target demands higher requirements regarding the physical layer (PHY) throughput. The key to high throughput is to devise an effective method for increasing the execution speed of the demodulated soft decision and the adaptive equalisation algorithm. In this paper, the C-NGHPAV system architecture is introduced and the technical details of the key features are described. Firstly, quadrature amplitude modulation (QAM) and the binary phase shift keying (BPSK) soft-decision algorithm known as the max-log-maximum a posteriori (MAP) algorithm with logarithmic complexity (max-log-map-lc) are realised. The algorithm is less complex than other soft-decision algorithms. Secondly, a parallel architecture of adaptive quadrature rectangle-decomposition-based least-squares lattice (QRD-LSL) equalisation algorithm is designed. The parallel QRD-LSL simultaneously offers a high speed-up ratio with reduced power consumption, while the advantage of throughput is more apparent with input signal increments compared to the traditional QRD-LSL. Finally, the performance of the algorithms is assessed using simulations reproducing coaxial scenarios. The field programmable gate array (FPGA) logic design of the PHY is implemented, and the results of packet loss analysis agree with the theoretical results.

KEYWORDS:

• C-NGHPAV
• PHY
• soft decision
• parallel equaliser

View correction statement:

Corrigendum

Additional information

Funding

This work was supported by the Science and Technology Commission of Shanghai Municipality under the C-HPAV2.0 Standard for Coaxial Cable project [grant number 12DZ1500900].

Notes on contributors

Daoping Jiang

Notes on contributors

Mr Daoping Jiang received his B.E. degree in Electronic Science and Technology from the Changchun University of Technology. He is currently pursuing his Ph.D. degree at the Shanghai Advanced Research Institute, Chinese Academy of Sciences, where he is also a 5G PHY Algorithm Engineer of the Micro-Nano Device Research Centre. He participates in setting the standards for next-generation broadcasting and 5G PHY. His research interests include MIMO equalisers, adaptive equalisation algorithms and QC-LDPC parallel decoder algorithm.

Zhaofeng Zhang

Dr Zhaofeng Zhang received his B.E. and M.E. degrees in Radio Engineering from the Southeast University in Nanjing, People's Republic of China and his Ph.D. degree from the Department of Electronic and Electrical Engineering at The Hong Kong University of Science and Technology. He is currently the Director and a Professor of the Micro-Nano Device Research Centre, Shanghai Advanced Research Institute, Chinese Academy of Sciences. His focus is now on Research & Development (R&D) and the industrialisation of communications devices and chips. He has published more than 30 papers and is the owner of about 50 patents.

Ge Gao

Mr Ge Gao received his B.E. degree in Information Security from Xidian University. In 2011, he joined Hikvision at Hangzhou, Zhejiang, where he worked as an Embedded Software Engineer and was mainly responsible for developing applications for DVR/NVR. He also participated in some projects on the construction of safe cities. Since April 2013, he has been an intern at the Shanghai Advanced Research Institute, Chinese Academy of Sciences. During May 2013 he helped improve the implementation of AES in UHF RFID. He is currently pursuing a master's degree at the Micro-Nano Device Research Centre, Shanghai Advanced Research Institute, Chinese Academy of Sciences. His research interests include safety issues in embedded devices and software engineering.

Jianmin Zhuang

Dr Jianmin Zhuang is a Professor at the Micro-Nano Device Research Centre. Having received his Ph.D. degree from Shanghai Jiao Tong University in 2000, his research focus at present is SoC and the industrialisation of communications device and embedded chips in networking.

Runsheng He

Dr Runsheng He is the CEO of Credo Semiconductor Inc. and has 18 years of IC system architect experience. Prior to Credo, he was appointed as Senior Director of the Architecture Group for Marvell Ethernet Products. Dr He was also with Marvell Semiconductor from 1998 to 2008.