Effect of Silicon Dioxide Hardness on Scratches in Interlevel Dielectric Chemical–Mechanical Polishing

Abstract

In the silicon dioxide chemical–mechanical polishing (CMP) process, one of the most challenging issues is the formation of defects such as scratches. In this study, scratch formation behavior and CMP performance were evaluated on high-density plasma oxide (HDP), plasma-enhanced tetraethylorthosilicate (PETEOS), and borophosphosilicate glass (BPSG) wafers. To evaluate the number of scratches after the CMP process, contaminated abrasive particles were removed using an optimized post-CMP cleaning process consisting of scrubber cleaning and dilute SC1 megasonic cleaning. The oxide wafers were then treated with dilute hydrogen fluoride (HF) in order to improve the visibility of the generated scratches. The number and shape of the scratches were investigated as a function of oxide film hardness. The results show that a decrease in film hardness correlates with an increase in the number of scratches. Three different types of scratches (chatter marks, line, and rolling) were observed on the oxide surfaces. The dominant scratch shape on all three oxide films was chatter mark–type scratches. This could be attributed to the stick–slip phenomenon. However, the overall fraction of chatter marks compared to other types of scratches (especially line scratches) was proportional to the film hardness. It was also found that scratch depth was strongly influenced by the polishing pressure during CMP. The results clearly show that the mechanical pro- perties of the surface play a critical role in scratch generation.

KEY WORDS:

• CMP
• Post-CMP Cleaning
• Interlevel Oxide
• Hardness
• Chatter Mark
• Line Scratch

Acknowledgments

Review led by Hong Liang