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Integrated Ferroelectrics
An International Journal
Volume 67, 2004 - Issue 1
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Original Articles

Fabrication of 1K-Bit 1T2C-Type Ferroelectric Memory Cell Array

Shuu'ichirou Yamamoto Department of Advanced Applied Electronics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, 4259 Nagatsuta, Midori-ku, Yokohama, Japan
,
Toru Ishikawa R&D Association for Future Electron Devices, 2-9-14 Toranomon, Minato-ku, Tokyo, Japan
,
Takaaki Fuchikami R&D Association for Future Electron Devices, 2-9-14 Toranomon, Minato-ku, Tokyo, Japan
,
Hyun-Soo Kim Department of Advanced Applied Electronics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, 4259 Nagatsuta, Midori-ku, Yokohama, Japan
,
Kouji Aizawa Precision and Intelligence Laboratory, Tokyo Institute of Technology, 4259 Nagatsuta, Midori-ku, Yokohama, Japan
,
Byung-Eun Park R&D Association for Future Electron Devices, 2-9-14 Toranomon, Minato-ku, Tokyo, Japan
,
Taisuke Furukawa R&D Association for Future Electron Devices, 2-9-14 Toranomon, Minato-ku, Tokyo, Japan
,
Hiroshi Ohki R&D Association for Future Electron Devices, 2-9-14 Toranomon, Minato-ku, Tokyo, Japan
,
Shin Kikuchi R&D Association for Future Electron Devices, 2-9-14 Toranomon, Minato-ku, Tokyo, Japan
,
Hiromasa Hoko R&D Association for Future Electron Devices, 2-9-14 Toranomon, Minato-ku, Tokyo, Japan
&
Hiroshi Ishiwara Department of Advanced Applied Electronics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, 4259 Nagatsuta, Midori-ku, Yokohama, Japan
 show all
Pages 281-286 | Received 01 Apr 2004, Accepted 01 Jul 2004, Published online: 12 Aug 2010
 
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Abstract

A 1K-bit 1T2C-type ferroelectric memory array has been designed and fabricated by combination of a 0.35 μm gate length CMOS process and a 3 μm design rule ferroelectric process. The write and readout operation in a 1K-bit 1T2C-type memory array cell has been confirmed experimentally.

ACKNOWLEDGMENT

This work was performed under the auspices of the R&D Projects in Cooperation with Academic Institution (Next-Generation Ferroelectric Memories), supported by New Energy and Industrial Technology Development Organization in Japan (NEDO) and managed by R&D Association for Future Electron Devices (FED).

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