ELECTRICAL PROPERTIES OF METAL-FERROELECTRIC-INSULATOR-SEMICONDUCTOR CAPACITORS USING Pt/(Bi_3.15Nd_0.85)(Ti_3−xV_x)O₁₂/ Y₂O₃/Si STRUCTURE

ABSTRACT

The metal-ferroelectric-insulator-semiconductor capacitors, fabricated using Pt/(Bi_3.15Nd_0.85)(Ti_3−x V _x )O₁₂/Y₂O₃/Si(100) structure, accommodate a Y₂O₃ thin film (20 nm) deposited on p-type Si(100) as an insulating layer, and a Nd³⁺/V⁵⁺-cosubstituted bismuth titanate, (Bi_3.15Nd_0.85)(Ti_3−x V _x )O₁₂ film prepared by chemical solution deposition as a ferroelectric layer. The capacitors exhibit large clockwise capacitance–voltage memory windows of 2.0, 2.2 and 2.4 V, and low leakage current densities of 7.3 × 10⁻⁹, 6.1 × 10⁻⁹ and 5.5 × 10⁻⁹ A/cm² at an applied voltage of 6 V for different vanadium contents of 0.09, 0.06 and 0.03, respectively. They are also characterized by good data retention, keeping the high and low capacitance values biased in hysteresis loops distinguishable for a period of over 14.6 days.

Keywords:

• MFIS capacitor
• memory window
• leakage current density
• retention characteristic

ACKNOWLEDGMENTS

This work was financially supported by Key Project of National Natural Science Foundation of China (NNSFC) (50531060), NSFC for Distinguished Young Scholars (10525211), NSFC (10672139 and 10472099), the Cultivation Fund of the Key Scientific and Technical innovation Projects, Ministry of Education of China (076044), and Key Project of Education Department of Hunan Province (06A072).