Distance Relaying Algorithm for a Line-to-ground Fault on Single Infeed Lines

Abstract

Abstract—The work presented in this article addresses the problems encountered by the conventional digital distance relay used for the protection of transmission lines fed from one end. To observe its behavior during a high-resistance single line-to-ground fault, a laboratory prototype of a three-phase transmission line using equivalent power system components has been developed by the authors. Thereafter, a new digital distance relaying algorithm is presented for the compensation of errors produced by the conventional digital distance relay during a high-resistance single line-to-ground fault. The proposed algorithm is based on digital computation of impedance, which uses symmetrical components of three-phase currents and voltages measured at the local end only. The proposed algorithm has been tested using MATLAB/SIMULINK (The MathWorks, Natick, Massachusetts, USA) software for a single line-to-ground fault considering wide variations in fault resistance, fault location, power factor, and short-circuit capacity of the source.

Keywords:

• digital distance protection
• single infeed line
• single line-to-ground fault
• fault resistance
• MATLAB/SIMULINK

Additional information

Notes on contributors

Vijay H. Makwana

Vijay H. Makwana received B.E. degree in electrical engineering and M.E. degree in electrical power systems from B.V.M. Engineering College, Sardar Patel University, Vallabh Vidyanagar, India in 1999 and 2002, respectively. He obtained Ph.D. degree in electrical engineering from SICART, Sardar Patel University, Vallabh Vidyanagar, India in 2013. He has a teaching experience of more than 11 years. Currently, he is working as a Professor in the Department of Electrical Engineering, G. H. Patel College of Engineering & Technology, Vallabh Vidyanagar, India. He has published 5 papers in international journals. He has also written book on Power System Protection and Switchgear published by Tata Mc-Graw Hill, 2010, India. His research interests include power system protection, planning and design, system modeling, and simulation.

Bhavesh Bhalja

Bhavesh Bhalja received B. E. and M. E. degree in power system engineering from B.V.M. Engineering College, Vallabh Vidyanagar, Gujarat, India in 1999 and 2001, respectively. He obtained Ph. D from Indian Institute of Technology Roorkee in 2007. He had a teaching experience of more than 13 years. Currently, he is working as an Assistant Professor, Department of Electrical Engineering, Indian Institute of Technology Roorkee, India. He has published more than 100 papers in journals at international and national levels. He got Young Engineers Award and Merit Award by Institution of Engineers, India in 2009 and 2007, respectively. He has also written book on Protection and Switchgear published by Oxford University Press, 2011, India. He is a senior member of IEEE. His research interests include smart grid technologies, power system protection and automation, distributed generation, power quality improvement, system modeling and simulation and artificial intelligence.